Patents by Inventor Lin

Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11977423
    Abstract: Methods and systems for thermal management of hardware resources that may be used to provide computer implemented services are disclosed. The disclosed thermal management method and systems may improve the likelihood of data processing systems providing desired computer implemented services by improving the thermal management of the hardware resources without impairment of storage devices. To improve the likelihood of the computer implemented services being provided, the systems may proactively identify whether storage devices subject to impairment due to dynamic motion are present. If such storage devices are present, then the system may automatically take action to reduce the likelihood of the storage devices being subject to dynamic motion sufficient to impair their operation.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: May 7, 2024
    Assignee: Dell Products L.P.
    Inventors: Hung-Pin Chien, Jyh-Yinn Lin, Yu-Wei Chi Liao, Chien Yen Hsu, Ming-Hui Pan
  • Patent number: 11975679
    Abstract: A harness system configured to facilitate adjustably securing guests with varying body types within a ride vehicle. The harness system may include a harness body configured to releasably couple with the ride vehicle, a waist engagement portion of the harness body, the waist engagement portion including a waist securement mechanism configured to contract or expand a functional length of the waist engagement portion to adjust for engagement with a waist of a guest, a vest portion of the harness body, wherein the vest portion includes a height adjuster configured to extend or retract such that shoulder bands extend or retract relative to the waist engagement portion, and a leg engagement portion comprising a first leg flap configured to adjustably secure about a first leg of the guest and a second leg flap configured to adjustable secure about a second leg of the guest.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: Universal City Studios LLC
    Inventors: Katarina Lin Gosbee, Dionté Omar Henderson, Steven C. Blum
  • Patent number: 11979244
    Abstract: Aspects of the present disclosure involve a system comprising a computer-readable storage medium storing a program and method for configuring 360-degree video within a virtual conferencing system. The program and method provide, in association with designing a room for virtual conferencing, a first interface for configuring at least one participant video element which is assignable to a respective participant video feed; receive, via the first interface, an indication of user input for setting first properties for the at least one participant video element; provide, in association with designing the room for virtual conferencing, a second interface for configuring a 360-degree video element which is assignable to a 360-degree video source; receive, via the second interface, an indication of user input for setting second properties for the 360-degree video element; and provide, in association with virtual conferencing, display of the room based on the first properties and the second properties.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: May 7, 2024
    Assignee: SNAP INC.
    Inventors: Andrew Cheng-min Lin, Walton Lin
  • Patent number: 11975643
    Abstract: A vehicle seat includes a seat cushion, a seat back pivotally moveable between an upright position and a reclined position, and at least one upper arm support selectively moveable between a stowed position and an extended position, the at least one upper arm support adapted to provide support for an upper arm of an occupant when the seat back of the vehicle seat is in the reclined position and the at least one upper arm support is in the extended position.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: May 7, 2024
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Nilesh D Mankame, Chin-hsu Lin, Paul W Alexander, Wonhee Michael Kim, Manuel Forero Rueda
  • Patent number: 11977979
    Abstract: Systems and techniques are provided for generating one or more models. For example, a process can include obtaining a plurality of input images corresponding to faces of one or more people during a training interval. The process can include determining a value of the coefficient representing at least the portion of the facial expression for each of the plurality of input images during the training interval. The process can include determining, from the determined values of the coefficient representing at least the portion of the facial expression for each of the plurality of input images during the training interval, an extremum value of the coefficient representing at least the portion of the facial expression during the training interval. The process can include generating an updated bounding value for the coefficient representing at least the portion of the facial expression based on the initial bounding value and the extremum value.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: May 7, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Kuang-Man Huang, Min-Hui Lin, Ke-Li Cheng, Michel Adib Sarkis
  • Patent number: 11977825
    Abstract: A discrete element method contact model building method includes: selecting a filling body in a disaster-causing structure to obtain a change rule of cumulative loss of the filling body; performing test simulation, and determining a relation function of each group of corresponding mesoscopic mechanical parameters in each time period and mesoscopic parameters of a DEM contact model representing a change rule of macroscopical parameters of the filling body; embedding each mesoscopic parameter relation function into an existing particle contact model, performing test simulation, and updating a fracture failure criterion of the contact model according to a corresponding relation of macro-mesoscopic strength during model failure; and based on a seepage failure indoor test, building a seepage failure discrete element calculation model, and simulating the seepage failure process of a rock and soil mass by using the obtained particle contact model and the fracture criterion of the particle contact model.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: May 7, 2024
    Assignee: SHANDONG UNIVERSITY
    Inventors: Shucai Li, Zongqing Zhou, Liping Li, Weimin Yang, Chunjin Lin, Shaoshuai Shi, Chenglu Gao, Chengshun Shang, Yang Geng, Songsong Bai
  • Patent number: 11977861
    Abstract: Systems and methods for embedding a computational notebook within an enterprise application software. A computational notebook editor embedded is embedded within a software client interface which is in communication with the software client interface. The application server comprises a reverse proxy server that is embedded within the application server. A container management system is in communication with the application server and comprises a multi-user server, a notebook interactive development environment, and a notebook execution tool.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: May 7, 2024
    Assignee: Kinaxis Inc.
    Inventors: Marcio Oliveira Almeida, Zhen Lin, Chantal Bisson-Krol
  • Patent number: 11978669
    Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Lin Chuang, Chia-Hao Chang, Sheng-Tsung Wang, Lin-Yu Huang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 11979180
    Abstract: A method for detecting and attenuating the impact of interference in a signal of a radio receiver with multiple tuners. The method includes providing a first input signal RF1 to a first tuner T1; simultaneously providing a second input signal RF2 to a second tuner T2; simultaneously producing a first intermediate high injection signal IFH1, by the first tuner T1, using the first input signal RF1 filtered on a first frequency fE, and a first intermediate low injection signal IFB2, by the second tuner T2, using the second input signal RF2 filtered on the first frequency fE; comparing the first intermediate high injection signal IFH1 and the first intermediate low injection signal IFB2; selecting one out of the first intermediate high injection signal IFH1 and the first intermediate low injection signal IFB2 to be decoded by the radio receiver.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: May 7, 2024
    Assignee: Continental Automotive Technologies GmbH
    Inventors: Chao Lin, Laurent Théry
  • Patent number: 11978802
    Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Wei Hsu, Chih-Hao Wang, Huan-Chieh Su, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu
  • Patent number: 11976805
    Abstract: A connection structure of an (light-emitting diode) LED wall lamp having a hidden switch contains: a fixer, a rotatable sleeve, a coupling ring, a lampshade, a connection seat, a LED light module, and a decoration element. The fixer includes multiple positioning orifices and a through orifice. The rotatable sleeve is configured to be rotatably connected with the coupling ring and includes a connecting shaft, a locating post, and a rotary section. The coupling ring is configured to connect the lampshade, the connection seat and the decoration element. The lampshade includes a circular platform and multiple threaded orifices. The connection seat is configured to connect the LED light module. The LED light module is configured to illuminate lights and includes multiple LED units and a switch built in the LED light module. The decoration element is mounted on the coupling ring to cover a central orifice of the circular disc.
    Type: Grant
    Filed: August 18, 2023
    Date of Patent: May 7, 2024
    Assignee: Giantech Industries Co., Ltd.
    Inventor: Chih-Cheng Lin
  • Patent number: 11980037
    Abstract: Described herein are ferroelectric (FE) memory cells that include transistors having gate stacks separate from FE capacitors of these cells. An example memory cell may be implemented as an IC device that includes a support structure (e.g., a substrate) and a transistor provided over the support structure and including a gate stack. The IC device also includes a FE capacitor having a first capacitor electrode, a second capacitor electrode, and a capacitor insulator of a FE material between the first capacitor electrode and the second capacitor electrode, where the FE capacitor is separate from the gate stack (i.e., is not integrated within the gate stack and does not have any layers that are part of the gate stack). The IC device further includes an interconnect structure, configured to electrically couple the gate stack and the first capacitor electrode.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: May 7, 2024
    Assignee: Intel Corporation
    Inventors: Nazila Haratipour, Shriram Shivaraman, Sou-Chi Chang, Jack T. Kavalieros, Uygar E. Avci, Chia-Ching Lin, Seung Hoon Sung, Ashish Verma Penumatcha, Ian A. Young, Devin R. Merrill, Matthew V. Metz, I-Cheng Tung
  • Patent number: 11977074
    Abstract: The invention relates to methods and products associated with in vivo enzyme profiling. In particular, biomarker nanoparticles capable of quantitatively detecting enzymatic activity in vivo are described. These nanoparticles can be used to detect in vivo enzyme activity. The invention also relates to products, kits, and databases for use in the methods of the invention.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: May 7, 2024
    Assignee: Massachusetts Institute of Technology
    Inventors: Sangeeta N. Bhatia, David K. Wood, Gabriel A. Kwong, Andrew David Warren, Kevin Y. Lin
  • Patent number: 11977318
    Abstract: A portable electronic device and a movable lens-shutting module thereof are provided. The lens-shutting module includes a first magnetic assembly, a second magnetic assembly and a movable shielding assembly. The first magnetic assembly includes a fixed magnetic field generator and a movable magnetic structure including a matching portion. The second magnetic assembly includes a fixed magnetic structure, a flexible structure and a movable magnetic field generator including a limiting portion. The movable shielding assembly includes a lens shielding portion corresponding to a lens module, a matching opening matching with the matching portion, and a limiting opening corresponding to the limiting portion.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: May 7, 2024
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: Kung-An Lin, Chien-Che Ting
  • Publication number: 20240145579
    Abstract: The present disclosure is directed to method for the fabrication of spacer structures between source/drain (S/D) epitaxial structures and metal gate structures in nanostructure transistors. The method includes forming a fin structure with alternating first and second nanostructure elements on a substrate. The method also includes etching edge portions of the first nanostructure elements in the fin structure to form cavities. Further, depositing a spacer material on the fin structure to fill the cavities and removing a portion of the spacer material in the cavities to form an opening in the spacer material. In addition, the method includes forming S/D epitaxial structures on the substrate to abut the fin structure and the spacer material so that sidewall portions of the S/D epitaxial structures seal the opening in the spacer material to form an air gap in the spacer material.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Yun PENG, Fu-Ting YEN, Keng-Chu LIN
  • Publication number: 20240144890
    Abstract: A backlight control circuit for a surface light emitting device is provided. The backlight control circuit includes a driving circuit. The driving circuit is configured to generate a plurality of driving currents to drive the surface light emitting device such that a plurality of backlight blocks of the surface light emitting device generate a plurality of brightness values. The surface light emitting device is divided into a first backlight area and a second backlight area. The second backlight area is closer to an edge of the surface light emitting device than the first backlight area. A first driving current of the plurality of driving currents is utilized for driving the light source of the first backlight area. A second driving current of the plurality of driving currents is utilized for driving the light source of the second backlight area. The second driving current is greater than the first driving current.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 2, 2024
    Applicant: Radiant Opto-Electronics Corporation
    Inventors: Li-Fei Wang, Yu-Lin Hsieh, Sheng-Kai Fang, Pei-Ling Kao
  • Publication number: 20240145357
    Abstract: The present disclosure provides an electronic assembly including a semiconductor device package. The semiconductor device package includes a first package and a conductive element. The first package includes an electronic component and a protection layer covering the electronic component. The conductive element is supported by the protection layer and electrically connected with the electronic component through an electrical contact. A method for manufacturing a semiconductor device package is also provided in the present disclosure.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 2, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang-Lin YEH, Jen-Chieh KAO
  • Patent number: D1025976
    Type: Grant
    Filed: October 9, 2023
    Date of Patent: May 7, 2024
    Inventor: Ziyu Lin
  • Patent number: D1026131
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: May 7, 2024
    Inventors: Jianfeng Lin, Jinsong Fan
  • Patent number: D1026195
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: May 7, 2024
    Inventor: Xiaojia Lin