Patents by Inventor Lincoln T. Simmons

Lincoln T. Simmons has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10884914
    Abstract: A technique for garbage collection in a storage system includes generating regrouping metadata for one or more pages of at least two logical erase blocks (LEB). The regrouping metadata indicates an associated stream for each of the pages. Multiple of the LEBs that include valid pages associated with a first stream are selected, based on the regrouping metadata, for regrouping. The valid pages associated with the first stream from the selected LEBs are regrouped into a new LEB.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: January 5, 2021
    Assignee: International Business Machines Corporation
    Inventors: Razik S. Ahmed, Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Jason Ma, Matthew R. Orr, Roman A. Pletka, Lincoln T. Simmons, Sasa Tomic
  • Patent number: 10621051
    Abstract: A controller-implemented method, according to one embodiment, includes: examining, by the controller, each of a plurality of journal entries from at least one journal beginning with a most recent one of the journal entries in a most recent one of the at least one journal and working towards an oldest one of the journal entries in an oldest one of the at least one journal, the journal entries corresponding to one or more updates made to one or more logical to physical table (LPT) entries of a LPT; determining, by the controller, whether a current LPT entry, which corresponds to a currently examined journal entry, has already been updated; and discarding, by the controller, the currently examined journal entry in response to determining that the current LPT entry has already been updated.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: April 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Roman A. Pletka, Lincoln T. Simmons, Sasa Tomic
  • Patent number: 10365859
    Abstract: In at least one embodiment, a controller of a non-volatile memory array iteratively performs a merged background management process independently of any host system's demand requests targeting the memory array. During an iteration of the merged background management process, the controller performs a read sweep by reading data from each of a plurality of page groups within the memory array and recording page group error statistics regarding errors detected by the reading for each page group, where each page group is formed of a respective set of one or more physical pages of storage in the memory array. During the iteration of the merged background management process, the controller employs the page group error statistics recorded during the read sweep in another background management function.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: July 30, 2019
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Roman A. Pletka, Lincoln T. Simmons, Sasa Tomic
  • Patent number: 10169145
    Abstract: According to one embodiment, a method includes issuing a read request to read one or more units of data from at least one non-volatile random access memory (NVRAM) device. The read request includes one or more read voltage thresholds. The method also includes receiving the one or more data units and read command parameters used to read the one or more data units from the at least one NVRAM device. Moreover, the method includes storing error-free data units, the read command parameters used to read the error-free data units from the at least one NVRAM device, and a read completion status to one of a plurality of read buffers. The read completion status indicates a completed read when a data unit is error-free and indicates an incomplete read when a data unit is errored.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: January 1, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Ashwitha Krishna Kumar, David A. Pierce, Kevin E. Sallese, Lincoln T. Simmons
  • Patent number: 10082962
    Abstract: In at least one embodiment, a controller of a non-volatile memory array including a plurality of subdivisions stores write data within the non-volatile memory array utilizing a plurality of block stripes of differing numbers of blocks, where all of the blocks within each block stripe are drawn from different ones of the plurality of subdivisions. The controller builds new block stripes for storing write data from blocks selected based on estimated remaining endurances of blocks in each of the plurality of subdivisions.
    Type: Grant
    Filed: November 24, 2017
    Date of Patent: September 25, 2018
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Ioannis Koltsidas, Jason Ma, Roman A. Pletka, Lincoln T. Simmons, Sasa Tomic
  • Patent number: 9971517
    Abstract: A method, according to one embodiment, includes: receiving a recirculation command; performing a coarse page lookup to determine valid ones of logical pages to be recirculated; requesting performance of a fine page lookup on source physical addresses containing the valid logical pages to verify the valid logical pages; and sending write commands corresponding to verified valid logical pages from the fine page lookup. Other systems, methods, and computer program products are described in additional embodiments.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: May 15, 2018
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Fisher, Lincoln T. Simmons, Adalberto G. Yanes
  • Publication number: 20180121094
    Abstract: In at least one embodiment, a controller of a non-volatile memory array including a plurality of subdivisions stores write data within the non-volatile memory array utilizing a plurality of block stripes of differing numbers of blocks, where all of the blocks within each block stripe are drawn from different ones of the plurality of subdivisions. The controller builds new block stripes for storing write data from blocks selected based on estimated remaining endurances of blocks in each of the plurality of subdivisions.
    Type: Application
    Filed: November 24, 2017
    Publication date: May 3, 2018
    Inventors: TIMOTHY J. FISHER, AARON D. FRY, NIKOLAS IOANNOU, IOANNIS KOLTSIDAS, JASON MA, ROMAN A. PLETKA, LINCOLN T. SIMMONS, SASA TOMIC
  • Patent number: 9946594
    Abstract: A flash memory codeword architecture is provided. A non-integer count of logical pages is packed into a codeword payload data container. A codeword payload header is generated. The codeword payload header includes an offset to a first logical page that is packed, at least in part, into the codeword payload data container. The codeword payload data container and the codeword payload header are concatenated to generate a codeword payload. Error-correcting code data is generated based, at least in part, on the codeword payload using a systematic error-correcting code. The codeword payload and error-correcting code data is concatenated to generate a codeword. A physical page is programmed with the codeword.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: April 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Lincoln T. Simmons, Adalberto G. Yanes
  • Publication number: 20180081765
    Abstract: A controller-implemented method, according to one embodiment, includes: examining, by the controller, each of a plurality of journal entries from at least one journal beginning with a most recent one of the journal entries in a most recent one of the at least one journal and working towards an oldest one of the journal entries in an oldest one of the at least one journal, the journal entries corresponding to one or more updates made to one or more logical to physical table (LPT) entries of a LPT; determining, by the controller, whether a current LPT entry, which corresponds to a currently examined journal entry, has already been updated; and discarding, by the controller, the currently examined journal entry in response to determining that the current LPT entry has already been updated.
    Type: Application
    Filed: November 28, 2017
    Publication date: March 22, 2018
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Roman A. Pletka, Lincoln T. Simmons, Sasa Tomic
  • Patent number: 9904607
    Abstract: A controller-implemented method, according to one embodiment, includes: restoring a valid snapshot of a LPT from the non-volatile random access memory, examining each journal entry from at least one journal beginning with a most recent one of the journal entries in a most recent one of the at least one journal and working towards an oldest one of the journal entries in an oldest one of the at least one journal, the journal entries corresponding to updates made to one or more entries of the LPT, determining whether a current LPT entry which corresponds to a currently examined journal entry has already been updated, using the currently examined journal entry to update the current LPT entry in response to determining that the current LPT entry has not already been updated, and discarding the currently examined journal entry in response to determining that the current LPT entry has already been updated.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: February 27, 2018
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Roman A. Pletka, Lincoln T. Simmons, Sasa Tomic
  • Patent number: 9875153
    Abstract: A flash memory codeword architecture is provided. A non-integer count of logical pages is packed into a codeword payload data container. A codeword payload header is generated. The codeword payload header includes an offset to a first logical page that is packed, at least in part, into the codeword payload data container. The codeword payload data container and the codeword payload header are concatenated to generate a codeword payload. Error-correcting code data is generated based, at least in part, on the codeword payload using a systematic error-correcting code. The codeword payload and error-correcting code data is concatenated to generate a codeword. A physical page is programmed with the codeword.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: January 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Lincoln T. Simmons, Adalberto G. Yanes
  • Patent number: 9857986
    Abstract: In at least one embodiment, a controller of a non-volatile memory array including a plurality of subdivisions stores write data within the non-volatile memory array utilizing a plurality of block stripes of differing numbers of blocks, where all of the blocks within each block stripe are drawn from different ones of the plurality of subdivisions. The controller builds new block stripes for storing write data from blocks selected based on estimated remaining endurances of blocks in each of the plurality of subdivisions.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: January 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Ioannis Koltsidas, Jason Ma, Roman A. Pletka, Lincoln T. Simmons, Sasa Tomic
  • Patent number: 9811419
    Abstract: A flash memory codeword architecture is provided. A non-integer count of logical pages is packed into a codeword payload data container. A codeword payload header is generated. The codeword payload header includes an offset to a first logical page that is packed, at least in part, into the codeword payload data container. The codeword payload data container and the codeword payload header are concatenated to generate a codeword payload. Error-correcting code data is generated based, at least in part, on the codeword payload using a systematic error-correcting code. The codeword payload and error-correcting code data is concatenated to generate a codeword. A physical page is programmed with the codeword.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: November 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Lincoln T. Simmons, Adalberto G. Yanes
  • Publication number: 20170242789
    Abstract: A technique for garbage collection in a data storage system includes determining a dirty physical byte count for each of a plurality of candidate garbage collection units. The dirty physical byte count provides a total amount of dirty bytes. At least one of a dirty physical codeword container count and a dirty physical page count is determined for each of the candidate garbage collection units. The dirty physical codeword container count provides an amount of physical codeword containers that are completely dirty and the dirty physical page count provides an amount of physical pages that are completely dirty. A garbage collection unit, included in the candidate garbage collection units, is selected for garbage collection based on the dirty physical byte count and at least one of the dirty physical codeword container count and the dirty physical page count.
    Type: Application
    Filed: February 19, 2016
    Publication date: August 24, 2017
    Inventors: RAZIK S. AHMED, TIMOTHY J. FISHER, AARON D. FRY, NIKOLAS IOANNOU, JASON MA, MATTHEW R. ORR, ROMAN A. PLETKA, LINCOLN T. SIMMONS, SASA TOMIC
  • Publication number: 20170242788
    Abstract: A technique for garbage collection in a storage system includes generating regrouping metadata for one or more pages of at least two logical erase blocks (LEB). The regrouping metadata indicates an associated stream for each of the pages. Multiple of the LEBs that include valid pages associated with a first stream are selected, based on the regrouping metadata, for regrouping. The valid pages associated with the first stream from the selected LEBs are regrouped into a new LEB.
    Type: Application
    Filed: February 19, 2016
    Publication date: August 24, 2017
    Inventors: RAZIK S. AHMED, CHARLES J. CAMP, TIMOTHY J. FISHER, AARON D. FRY, NIKOLAS IOANNOU, JASON MA, MATTHEW R. ORR, ROMAN A. PLETKA, LINCOLN T. SIMMONS, SASA TOMIC
  • Patent number: 9740609
    Abstract: A technique for garbage collection in a data storage system includes determining a dirty physical byte count for each of a plurality of candidate garbage collection units. The dirty physical byte count provides a total amount of dirty bytes. At least one of a dirty physical codeword container count and a dirty physical page count is determined for each of the candidate garbage collection units. The dirty physical codeword container count provides an amount of physical codeword containers that are completely dirty and the dirty physical page count provides an amount of physical pages that are completely dirty. A garbage collection unit, included in the candidate garbage collection units, is selected for garbage collection based on the dirty physical byte count and at least one of the dirty physical codeword container count and the dirty physical page count.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: August 22, 2017
    Assignee: International Business Machines Corporation
    Inventors: Razik S. Ahmed, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Jason Ma, Matthew R. Orr, Roman A. Pletka, Lincoln T. Simmons, Sasa Tomic
  • Publication number: 20170192677
    Abstract: A method, according to one embodiment, includes: receiving a recirculation command; performing a coarse page lookup to determine valid ones of logical pages to be recirculated; requesting performance of a fine page lookup on source physical addresses containing the valid logical pages to verify the valid logical pages; and sending write commands corresponding to verified valid logical pages from the fine page lookup. Other systems, methods, and computer program products are described in additional embodiments.
    Type: Application
    Filed: March 22, 2017
    Publication date: July 6, 2017
    Inventors: Timothy J. Fisher, Lincoln T. Simmons, Adalberto G. Yanes
  • Publication number: 20170139781
    Abstract: A controller-implemented method, according to one embodiment, includes: restoring a valid snapshot of a LPT from the non-volatile random access memory, examining each journal entry from at least one journal beginning with a most recent one of the journal entries in a most recent one of the at least one journal and working towards an oldest one of the journal entries in an oldest one of the at least one journal, the journal entries corresponding to updates made to one or more entries of the LPT, determining whether a current LPT entry which corresponds to a currently examined journal entry has already been updated, using the currently examined journal entry to update the current LPT entry in response to determining that the current LPT entry has not already been updated, and discarding the currently examined journal entry in response to determining that the current LPT entry has already been updated.
    Type: Application
    Filed: November 13, 2015
    Publication date: May 18, 2017
    Inventors: Charles J. Camp, Timothy J. Fisher, Aaron D. Fry, Nikolas Ioannou, Roman A. Pletka, Lincoln T. Simmons, Sasa Tomic
  • Patent number: 9652157
    Abstract: A method, according to one embodiment, includes: receiving a recirculation command, performing a coarse page lookup to determine valid ones of logical pages to be recirculated, issuing write commands for the valid logical pages, requesting performance of a fine page lookup on source physical addresses containing the valid logical pages to verify the valid logical pages, receiving verified valid logical pages resulting from the fine page lookup, and sending the write commands corresponding to the verified valid logical pages. Other systems, methods, and computer program products are described in additional embodiments.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: May 16, 2017
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Fisher, Lincoln T. Simmons, Adalberto G. Yanes
  • Patent number: 9645924
    Abstract: A computer processor determines an over-provisioning ratio and a host write pattern. The computer processor determines a write amplification target based on the host write pattern and the over-provisioning ratio. The computer processor determines a staleness threshold, wherein the staleness threshold corresponds to a ratio of valid pages of a block to total pages of the block. The computer processor erases a first block having a staleness which exceeds the staleness threshold.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: May 9, 2017
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Fisher, Aaron D. Fry, Samuel K. Ingram, Lincoln T. Simmons