Patents by Inventor Linda Ann Barnhart

Linda Ann Barnhart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6701509
    Abstract: An integrated circuit includes a plurality of blocks of cells, and a plurality of layers with conductors for signal and power routing. Power and ground connections for individual cells are supplied by power and ground conductors in a first layer of conductors at the cell level. Power and ground conductors at the block level are supplied by power and ground conductors at the top level of the layers which are connected to the first layer power and ground conductors by stacked vias. Intervening layers of conductors can be used for signal routing. This routing technique improves circuit density as compared to prior techniques where the block level power and ground conductors were in a second, lower level of conductors instead of a top level. A layout method is also disclosed in which the conductors for signal routing are defined in dependence on the placement of the block level power and ground conductors.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: March 2, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Lily Aggarwal, Linda Ann Barnhart
  • Publication number: 20020093036
    Abstract: An integrated circuit includes a plurality of blocks of cells, and a plurality of layers with conductors for signal and power routing. Power and ground connections for individual cells are supplied by power and ground conductors in a first layer of conductors at the cell level. Power and ground conductors at the block level are supplied by power and ground conductors at the top level of the layers which are connected to the first layer power and ground conductors by stacked vias. Intervening layers of conductors can be used for signal routing. This routing technique improves circuit density as compared to prior techniques where the block level power and ground conductors were in a second, lower level of conductors instead of a top level. A layout method is also disclosed in which the conductors for signal routing are defined in dependence on the placement of the block level power and ground conductors.
    Type: Application
    Filed: November 9, 2001
    Publication date: July 18, 2002
    Applicant: Philips Electronics North America Corporation
    Inventors: Lily Aggarwal, Linda Ann Barnhart
  • Patent number: 6388332
    Abstract: An integrated circuit includes a plurality of blocks of cells, and a plurality of layers with conductors for signal and power routing. Power and ground connections for individual cells are supplied by power and ground conductors in a first layer of conductors at the cell level. Power and ground conductors at the block level are supplied by power and ground conductors at the top level of the layers which are connected to the first layer power and ground conductors by stacked vias. Intervening layers of conductors can be used for signal routing. This routing technique improves circuit density as compared to prior techniques where the block level power and ground conductors were in a second, lower level of conductors instead of a top level. A layout method is also disclosed in which the conductors for signal routing are defined in dependence on the placement of the block level power and ground conductors.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: May 14, 2002
    Assignee: Philips Electronics North America Corporation
    Inventors: Lily Aggarwal, Linda Ann Barnhart