Abstract: A compiler for compiling a computer program which is adapted for use with a data parallel computer. The compiler supports variables which involve parallelism. Variables which involve parallelism are parallel variables, templates for parallel variables called shapes, and pointers to parallel variables. For each variable involving parallelism declared globally in the source code, the compiler of the present invention emits in the target code a declaration of a global scalar variable. It further emits in the target code a start trap. When executed, the start trap allocates memory and a data structure for the global variables involving parallelism. The start trap also initializes the data structures and global variables involving parallelism.

Abstract: A compiler for compiling a computer program which is adapted for use with a data parallel computer. The compiler supports variables which involve parallelism. Variables which involve parallelism are parallel variables, templates for parallel variables called shapes, and pointers to parallel variables. For each variable involving parallelism declared globally in the source code, the compiler of the present invention emits in the target code a declaration of a global scalar variable. It further emits in the target code a start trap. When executed, the start trap allocates memory and a data structure for the global variables involving parallelism. The start trap also initializes the data structures and global variables involving parallelism.

Abstract: The present invention provides a parallel vector machine model for building a compiler that exploits three different levels of parallelism found in a variety of parallel processing machines, and in particular, the Connection Machine.RTM. Computer CM-2 system. The fundamental idea behind the parallel vector machine model is to have a target machine that has a collection of thousands of vector processors each with its own interface to memory. Thus allowing a fine-grained array-based source program to be mapped onto a course-grained hardware made up of the vector processors. In the parallel vector machine model used by CM Fortran 1.0, the FPUs, their registers, and the memory hiearchy are directly exposed to the compiler. Thus, the CM-2 target machine is not 64K simple bit-serial processors. Rather, the target is a machine containing 2K PEs (processing elements), where each PE is both superpipelined and superscalar. The compiler uses data distribution to spread the problem out among the 2K processors.