Patents by Inventor Lindell YEHUDA

Lindell YEHUDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11599681
    Abstract: The present invention provides a bit decomposition secure computation system comprising: a share value storage apparatus to store share values obtained by applying (2, 3) type RSS using modulo of power of 2 arithmetic; a decomposed share value storage apparatus to store a sequence of share values obtained by applying (2, 3) type RSS using modulo 2 arithmetic; and a bit decomposition secure computation apparatus that, with respect to sharing of a value w, r1, r2, and r3 satisfying w=r1+r2+r3 mod 2{circumflex over (?)}n, where {circumflex over (?)} is a power operator and n is a preset positive integer, being used as share information by the (2, 3) type RSS stored in the share value storage apparatus, includes: an addition sharing unit that sums two values out of r1, r2 and r3 by modulo 2{circumflex over (?)}n, generates and distributes a share value of the (2, 3) type RSS with respect to the sum; and a full adder secure computation unit that executes addition processing of the value generated by the addition s
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: March 7, 2023
    Assignees: NEC CORPORATION, BAR-ILAN UNIVERSITY
    Inventors: Toshinori Araki, Kazuma Ohara, Jun Furukawa, Lindell Yehuda, Nof Ariel
  • Patent number: 11334353
    Abstract: A method for multiparty computation wherein a plurality of parties each compute a preset function without revealing inputs thereof to others, comprises: each of the parties performing a validation step to validate that computation of the function is carried out correctly, wherein the validation step includes: a first step that prepares a plurality of verified multiplication triples and feeds a multiplication triple to a second step when required; and the second step that consumes a randomly selected multiplication triple generated by the first step, wherein the first step performs shuffling of the generated multiplication triples, in at least one of shuffle in a sequence and shuffle of sequences.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: May 17, 2022
    Assignees: NEC CORPORATION, BAR-ILAN UNIVERSITY
    Inventors: Toshinori Araki, Kazuma Ohara, Jun Furukawa, Lindell Yehuda, Nof Ariel
  • Publication number: 20210334099
    Abstract: A method for multiparty computation wherein a plurality of parties each compute a preset function without revealing inputs thereof to others, comprises: each of the parties performing a validation step to validate that computation of the function is carried out correctly, wherein the validation step includes: a first step that prepares a plurality of verified multiplication triples and feeds a multiplication triple to a second step when required; and the second step that consumes a randomly selected multiplication triple generated by the first step, wherein the first step performs shuffling of the generated multiplication triples, in at least one of shuffle in a sequence and shuffle of sequences.
    Type: Application
    Filed: May 18, 2017
    Publication date: October 28, 2021
    Applicants: NEC CORPORATION, BAR-ILAN UNIVERSITY
    Inventors: Toshinori ARAKI, Kazuma OHARA, Jun FURUKAWA, Lindell YEHUDA, Nof ARIEL
  • Publication number: 20210157955
    Abstract: The present invention provides a bit decomposition secure computation system comprising: a share value storage apparatus to store share values obtained by applying (2, 3) type RSS using modulo of power of 2 arithmetic; a decomposed share value storage apparatus to store a sequence of share values obtained by applying (2, 3) type RSS using modulo 2 arithmetic; and a bit decomposition secure computation apparatus that, with respect to sharing of a value w, r1, r2, and r3 satisfying w=r1+r2+r3 mod 2{circumflex over (?)}n, where {circumflex over (?)} is a power operator and n is a preset positive integer, being used as share information by the (2, 3) type RSS stored in the share value storage apparatus, includes: an addition sharing unit that sums two values out of r1, r2 and r3 by modulo 2{circumflex over (?)}n, generates and distributes a share value of the (2, 3) type RSS with respect to the sum; and a full adder secure computation unit that executes addition processing of the value generated by the addition s
    Type: Application
    Filed: May 18, 2017
    Publication date: May 27, 2021
    Applicants: NEC CORPORATION, BAR-ILAN UNIVERSITY
    Inventors: Toshinori ARAKI, Kazuma OHARA, Jun FURUKAWA, Lindell YEHUDA, Nof ARIEL