Patents by Inventor Ling-Chieh Li
Ling-Chieh Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11502052Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.Type: GrantFiled: June 24, 2020Date of Patent: November 15, 2022Assignee: Novatek Microelectronics Corp.Inventors: Ling-Chieh Li, Chiao-Ling Huang
-
Publication number: 20200321300Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.Type: ApplicationFiled: June 24, 2020Publication date: October 8, 2020Applicant: Novatek Microelectronics Corp.Inventors: Ling-Chieh Li, Chiao-Ling Huang
-
Patent number: 10734344Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.Type: GrantFiled: July 10, 2018Date of Patent: August 4, 2020Assignee: Novatek Microelectronics Corp.Inventors: Ling-Chieh Li, Chiao-Ling Huang
-
Patent number: 10643921Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a heat dissipation sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The heat dissipation sheet includes a first adhesive layer disposed over the base film, a second adhesive layer disposed over the first adhesive layer, and a graphite layer disposed between the first adhesive layer and the second adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer is a double-sided adhesive with carrier, which comprises two adhesives and a carrier disposed between the two adhesives.Type: GrantFiled: August 6, 2019Date of Patent: May 5, 2020Assignee: Novatek Microelectronics Corp.Inventors: Wen-Ching Huang, Chien-Chen Ko, Ling-Chieh Li
-
Publication number: 20190363032Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a heat dissipation sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The heat dissipation sheet includes a first adhesive layer disposed over the base film, a second adhesive layer disposed over the first adhesive layer, and a graphite layer disposed between the first adhesive layer and the second adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer is a double-sided adhesive with carrier, which comprises two adhesives and a carrier disposed between the two adhesives.Type: ApplicationFiled: August 6, 2019Publication date: November 28, 2019Applicant: Novatek Microelectronics Corp.Inventors: Wen-Ching Huang, Chien-Chen Ko, Ling-Chieh Li
-
Patent number: 10418305Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a heat dissipation sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The heat dissipation sheet includes a first adhesive layer disposed over the base film, a second adhesive layer disposed over the first adhesive layer, and a graphite layer disposed between the first adhesive layer and the second adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer is a double-sided adhesive with carrier, which comprises two adhesives and a carrier disposed between the two adhesives.Type: GrantFiled: January 30, 2019Date of Patent: September 17, 2019Assignee: Novatek Microelectronics Corp.Inventors: Wen-Ching Huang, Chien-Chen Ko, Ling-Chieh Li
-
Publication number: 20190198417Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a heat dissipation sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The heat dissipation sheet includes a first adhesive layer disposed over the base film, a second adhesive layer disposed over the first adhesive layer, and a graphite layer disposed between the first adhesive layer and the second adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer is a double-sided adhesive with carrier, which comprises two adhesives and a carrier disposed between the two adhesives.Type: ApplicationFiled: January 30, 2019Publication date: June 27, 2019Applicant: Novatek Microelectronics Corp.Inventors: Wen-Ching Huang, Chien-Chen Ko, Ling-Chieh Li
-
Publication number: 20190198473Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.Type: ApplicationFiled: July 10, 2018Publication date: June 27, 2019Applicant: Novatek Microelectronics Corp.Inventors: Ling-Chieh Li, Chiao-Ling Huang