Patents by Inventor Ling-Chih Chou
Ling-Chih Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9826632Abstract: A multi-layer substrate structure to achieve multiple arrangements of power/ground domains is disclosed. The multi-layer substrate structure comprises a first layer for disposing an integrated circuit thereon and a second layer coupled to the first layer, wherein a connection structure is electrically connected to a plurality of power/ground domains on the second layer. With different combinations of the sawing lines and keep-out regions on the multi-layer substrate structure for cutting off some portions of the connection structure, the invention can achieve multiple arrangements of power/ground domains without impacting the customer's PCB or system board design so as to cut short the cycle time for engineering development phase.Type: GrantFiled: April 6, 2016Date of Patent: November 21, 2017Assignees: Global Unichip Corp., Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Yu-Ru Chang, Yu-Fang Hsia, Ling-Chih Chou
-
Patent number: 9756721Abstract: A multilayer laminated substrate structure includes plural substrate layers stacked with each other, and a conductive via portion. One of the substrate layers is provided with a through hole. The conductive via portion includes a first signal conductive pad having a first rib, a second signal conductive pad having a second rib, and a conductive body which is disposed in the through hole and is electrically connected to the first rib and the second rib. The first signal conductive pad and the second signal conductive pad are disposed on two opposite surfaces of the substrate layer, and the first rib and the second rib are arranged in a staggered manner in relation to each other.Type: GrantFiled: April 11, 2016Date of Patent: September 5, 2017Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jia-Liang Chen, Ting-Ju Lin, Ling-Chih Chou
-
Patent number: 9729123Abstract: A common-mode filter includes a first transmission line, a second transmission line, a first wiring layer, a second wiring layer and a third wiring layer. The first wiring layer includes a first conductive capacitor plate, in which at least partial first transmission line is in the first wiring layer, and electrically coupled with the first conductive capacitor plate. The second wiring layer includes a second conductive plate and a first inductor, and the second conductive capacitor plate is electrically coupled with the first inductor. The third wiring layer includes a third conductive capacitor plate, in which at least partial second transmission line is in the second wiring layer, and electrically coupled with the third conductive capacitor plate. The first conductive capacitor plate at least partial faces the second conductive capacitor plate, and the second conductive capacitor plate at least partial faces the third conductive capacitor plate.Type: GrantFiled: September 24, 2015Date of Patent: August 8, 2017Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Po-Wei Chiu, Jia-Liang Chen, Ling-Chih Chou
-
Publication number: 20170188452Abstract: A multilayer laminated substrate structure includes plural substrate layers stacked with each other, and a conductive via portion. One of the substrate layers is provided with a through hole. The conductive via portion includes a first signal conductive pad having a first rib, a second signal conductive pad having a second rib, and a conductive body which is disposed in the through hole and is electrically connected to the first rib and the second rib. The first signal conductive pad and the second signal conductive pad are disposed on two opposite surfaces of the substrate layer, and the first rib and the second rib are arranged in a staggered manner in relation to each other.Type: ApplicationFiled: April 11, 2016Publication date: June 29, 2017Inventors: Jia-Liang CHEN, Ting-Ju LIN, Ling-Chih CHOU
-
Publication number: 20170012595Abstract: A common-mode filter includes a first transmission line, a second transmission line, a first wiring layer, a second wiring layer and a third wiring layer. The first wiring layer includes a first conductive capacitor plate, in which at least partial first transmission line is in the first wiring layer, and electrically coupled with the first conductive capacitor plate. The second wiring layer includes a second conductive plate and a first inductor, and the second conductive capacitor plate is electrically coupled with the first inductor. The third wiring layer includes a third conductive capacitor plate, in which at least partial second transmission line is in the second wiring layer, and electrically coupled with the third conductive capacitor plate. The first conductive capacitor plate at least partial faces the second conductive capacitor plate, and the second conductive capacitor plate at least partial faces the third conductive capacitor plate.Type: ApplicationFiled: September 24, 2015Publication date: January 12, 2017Inventors: Po-Wei CHIU, Jia-Liang CHEN, Ling-Chih CHOU
-
Publication number: 20160219699Abstract: A multi-layer substrate structure to achieve multiple arrangements of power/ground domains is disclosed. The multi-layer substrate structure comprises a first layer for disposing an integrated circuit thereon and a second layer coupled to the first layer, wherein a connection structure is electrically connected to a plurality of power/ground domains on the second layer. With different combinations of the sawing lines and keep-out regions on the multi-layer substrate structure for cutting off some portions of the connection structure, the invention can achieve multiple arrangements of power/ground domains without impacting the customer's PCB or system board design so as to cut short the cycle time for engineering development phase.Type: ApplicationFiled: April 6, 2016Publication date: July 28, 2016Applicants: GLOBAL UNICHIP CORP., Taiwan Semiconductor Manufacturing Company LTD.Inventors: Yu-Ru Chang, Yu-Fang Hsia, Ling-Chih Chou
-
Patent number: 9345132Abstract: The present invention discloses a package substrate layout design to achieve multiple substrate functions for engineering development and verification. The substrate layout contains a connection structure to connect to a plurality of power/ground domains on the package substrate. With different combination of the cutting lines on the package substrate, the invention can achieve multiple substrate functions without impacting the customer's PCB or system board design and provide cost effective and fast cycle time for engineering development phase.Type: GrantFiled: February 7, 2013Date of Patent: May 17, 2016Assignees: Global Unichip Corp., Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Yu-Ru Chang, Yu-Fang Hsia, Ling-Chih Chou
-
Patent number: 9282631Abstract: Circuit with flat electromagnetic band gap resonance structure, includes a plurality of flat units formed at a conductor layer; each flat unit spirally revolves inward from a first end to an internal point following a rotation direction, and spirally revolves outward from the internal point to a second end following an opposite rotation direction. Each flat unit is connected to a ground plane by a conductive stand (e.g., a via) at a connection point, for suppressing noise resonances at certain frequencies, and the frequencies are related to a stub length of each flat unit, and the stub length is related to a route length from the connection point to an end.Type: GrantFiled: August 5, 2014Date of Patent: March 8, 2016Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Po-Wei Chiu, Yi-Jung Liu, Ling-Chih Chou
-
Publication number: 20150041185Abstract: Circuit with flat electromagnetic band gap resonance structure, includes a plurality of flat units formed at a conductor layer; each flat unit spirally revolves inward from a first end to an internal point following a rotation direction, and spirally revolves outward from the internal point to a second end following an opposite rotation direction. Each flat unit is connected to a ground plane by a conductive stand (e.g., a via) at a connection point, for suppressing noise resonances at certain frequencies, and the frequencies are related to a stub length of each flat unit, and the stub length is related to a route length from the connection point to an end.Type: ApplicationFiled: August 5, 2014Publication date: February 12, 2015Inventors: Po-Wei Chiu, Yi-Jung Liu, Ling-Chih Chou
-
Publication number: 20140216802Abstract: The present invention discloses a package substrate layout design to achieve multiple substrate functions for engineering development and verification. The substrate layout contains a connection structure to connect to a plurality of power/ground domains on the package substrate. With different combination of the cutting lines on the package substrate, the invention can achieve multiple substrate functions without impacting the customer's PCB or system board design and provide cost effective and fast cycle time for engineering development phase.Type: ApplicationFiled: February 7, 2013Publication date: August 7, 2014Inventors: Yu-Ru Chang, Yu-Fang Hsia, Ling-Chih Chou