Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, a molding compound and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The at least one semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The molding compound is disposed over the interposer and laterally encapsulates the at least one semiconductor die. The molding compound laterally wraps around the interposer and the molding compound at least physically contacts a portion of the sidewalls of the interposer. The connectors are disposed on the second surface of the interposer, and are electrically connected with the at least one semiconductor die through the interposer.

Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, a molding compound and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The at least one semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The molding compound is disposed over the interposer and laterally encapsulates the at least one semiconductor die. The molding compound laterally wraps around the interposer and the molding compound at least physically contacts a portion of the sidewalls of the interposer. The connectors are disposed on the second surface of the interposer, and are electrically connected with the at least one semiconductor die through the interposer.

Abstract: A mold for manufacturing an artificial shuttlecock from a semi-finished shuttlecock includes a male mold and a female mold. The male mold includes a cone frustum and a plurality of first annular grooves. The semi-finished shuttlecock is placed on an outside of the cone frustum. The first annular grooves are disposed apart on the outside of the cone frustum. The female mold includes a tapered slot, a plurality of second annular grooves and an injection channel. The second annular grooves are disposed apart on an inner surface of the tapered slot. When the semi-finished shuttlecock and the male mold are placed into the female mold, each of the first annular grooves corresponds to each of the second annular grooves to form a plurality of molded grooves. The injection channel communicates with the second annular grooves, and the molded grooves communicate with the injection channel through the second annular grooves.

Abstract: A display panel includes a first substrate, a second substrate, a liquid crystal layer, a pixel electrode, a common electrode, a first polarizer and a second polarizer. The pixel electrode includes a trunk portion, first to fourth branch portions, and first to fourth strip portions. The trunk portion extends along a first direction. The first and second branch portions are connected to a first end of the trunk portion. The third and fourth branch portions are connected to a second end of the trunk portion. The first strip portions are connected to the first and second branch portions. The second strip portions are connected to the third and fourth branch portions. The third strip portions are connected to the first and third branch portions and the trunk portion. The fourth strip portions are connected to the second and fourth branch portions and the trunk portion.

Abstract: A mold for manufacturing an artificial shuttlecock from a semi-finished shuttlecock includes a male mold and a female mold. The male mold includes a cone frustum and a plurality of first annular grooves. The semi-finished shuttlecock is placed on an outside of the cone frustum. The first annular grooves are disposed apart on the outside of the cone frustum. The female mold includes a tapered slot, a plurality of second annular grooves and an injection channel. The second annular grooves are disposed apart on an inner surface of the tapered slot. When the semi-finished shuttlecock and the male mold are placed into the female mold, each of the first annular grooves corresponds to each of the second annular grooves to form a plurality of molded grooves. The injection channel communicates with the second annular grooves, and the molded grooves communicate with the injection channel through the second annular grooves.

Abstract: A display panel includes a first substrate, a second substrate, a liquid crystal layer, a pixel electrode, a common electrode, a first polarizer and a second polarizer. The pixel electrode includes a trunk portion, first to fourth branch portions, and first to fourth strip portions. The trunk portion extends along a first direction. The first and second branch portions are connected to a first end of the trunk portion. The third and fourth branch portions are connected to a second end of the trunk portion. The first strip portions are connected to the first and second branch portions. The second strip portions are connected to the third and fourth branch portions. The third strip portions are connected to the first and third branch portions and the trunk portion. The fourth strip portions are connected to the second and fourth branch portions and the trunk portion.

Abstract: A display device includes a plurality of transparent voltage-dividing common electrodes and a plurality of pixel units. The transparent voltage-dividing common electrodes are electrically isolated from each other in a first direction. Each of the pixel units includes a first pixel electrode, a second pixel electrode, and a voltage-dividing switch. The first pixel electrode is configured to receive a data voltage. The second pixel electrode is configured to receive the data voltage. The voltage-dividing switch is configured to divide the data voltage on the second pixel electrode to one of the transparent voltage-dividing common electrodes.

Abstract: The present disclosure relates to a training method and a training system for training a learning network for medical image analysis. The training method includes: acquiring an original training data set for a learning network with a predetermined structure; performing, by a processor, a pre-training on the learning network using the original training data set to obtain a pre-trained learning network; evaluating, by the processor, the pre-trained learning network to determine whether the pre-trained learning network has an evaluation defect; when the pre-trained learning network has the evaluation defect, performing, by the processor, a data augmentation on the original training data set for the existing evaluation defect; and performing, by the processor, a refined training on the pre-trained learning network using a data augmented training data set.

Abstract: A display device includes a first substrate, a first metal layer, a gate insulating layer, semiconductor channels, a second metal layer, a color filter layer, a shielding electrode, an insulating layer, pixel electrodes, a liquid crystal layer, a second substrate and a second common electrode. The first metal layer is located on the first substrate and includes scan lines, gates and first common electrodes. The gate insulating layer is located on the first metal layer. The semiconductor channels are located on the gate insulating layer. The second metal layer is located on the gate insulating layer, and includes sources, drains and data lines. The color filter layer is located on the second metal layer. The shielding electrode at least partially overlaps the second metal layer. The insulating layer is located on the color filter layer. The second common electrode is located on the second substrate.

Abstract: A display device includes a plurality of transparent voltage-dividing common electrodes and a plurality of pixel units. The transparent voltage-dividing common electrodes are electrically isolated from each other in a first direction. Each of the pixel units includes a first pixel electrode, a second pixel electrode, and a voltage-dividing switch. The first pixel electrode is configured to receive a data voltage. The second pixel electrode is configured to receive the data voltage. The voltage-dividing switch is configured to divide the data voltage on the second pixel electrode to one of the transparent voltage-dividing common electrodes.

Abstract: A display device includes a first substrate, a first metal layer, a gate insulating layer, semiconductor channels, a second metal layer, a color filter layer, a shielding electrode, an insulating layer, pixel electrodes, a liquid crystal layer, a second substrate and a second common electrode. The first metal layer is located on the first substrate and includes scan lines, gates and first common electrodes. The gate insulating layer is located on the first metal layer. The semiconductor channels are located on the gate insulating layer. The second metal layer is located on the gate insulating layer, and includes sources, drains and data lines. The color filter layer is located on the second metal layer. The shielding electrode at least partially overlaps the second metal layer. The insulating layer is located on the color filter layer. The second common electrode is located on the second substrate.

Abstract: A display device includes a plurality of transparent voltage-dividing common electrodes and a plurality of pixel units. The transparent voltage-dividing common electrodes are electrically isolated from each other in a first direction. Each of the pixel units includes a first pixel electrode, a second pixel electrode, and a voltage-dividing switch. The first pixel electrode is configured to receive a data voltage. The second pixel electrode is configured to receive the data voltage. The voltage-dividing switch is configured to divide the data voltage on the second pixel electrode to one of the transparent voltage-dividing common electrodes.

Abstract: An organic photodetector for detecting infrared, visible and ultraviolet radiation is provided with a tunable spectral response to achieve a high responsivity at different design wavelengths. The organic photodetector comprises at least a substrate, a first electrode, a second electrode and at least one organic material, which is arranged between the first and the second electrodes, wherein a Schottky barrier is formed at the interface between the first electrode and the organic material and/or at the interface between the second electrode and the organic material. The tunability in the responsivity of the organic photodetector is achieved by structuring at least one electrode so that it comprises nano-apertures for exciting surface plasmon resonances.

Abstract: A battery with a heat-resistant layer is provided. The battery with a heat-resistant layer includes a positive electrode, a negative electrode, a separator, an electrolyte and a heat-resistant layer. The separator is disposed between the positive electrode and the negative electrode. The heat-resistant layer is disposed between at least one of the positive or negative electrodes and the separator, wherein the heat-resistant layer has a tetrapod-shaped surface morphology. The positive electrode, the negative electrode, the separator and the heat-resistant layer are soaked in the electrolyte. A method for manufacturing the heat-resistant layer is also provided.

Abstract: The claimed subject matter relates to an architecture that can facilitate more efficient free view generation in Ray-Space by way of a Radon transform. The architecture can render virtual views based upon original image data by employing Ray-Space interpolation techniques. In particular, the architecture can apply the Radon transform to a feature epipolar plane image (FEPI) to extract more suitable slope or direction candidates. In addition, the architecture can facilitate improved block-based matching techniques in order to determine an optimal linear interpretation direction.

Abstract: The claimed subject matter relates to an architecture that can facilitate more efficient free view generation in Ray-Space by way of a Radon transform. The architecture can render virtual views based upon original image data by employing Ray-Space interpolation techniques. In particular, the architecture can apply the Radon transform to a feature epipolar plane image (FEPI) to extract more suitable slope or direction candidates. In addition, the architecture can facilitate improved block-based matching techniques in order to determine an optimal linear interpretation direction.

Abstract: The claimed subject matter relates to an architecture that can facilitate more efficient free view generation in Ray-Space by way of a Radon transform. The architecture can render virtual views based upon original image data by employing Ray-Space interpolation techniques. In particular, the architecture can apply the Radon transform to a feature epipolar plane image (FEPI) to extract more suitable slope or direction candidates. In addition, the architecture can facilitate improved block-based matching techniques in order to determine an optimal linear interpretation direction.