Abstract: A method for executing the power on self test (POST) on the computer system and a method for updating the SMBIOS information partially are provided for a computer system with a first memory and a second memory, wherein the first memory comprises a first storage block and a second storage block. A user can previously set the specific SMBIOS information in the second storage block. And during the POST stage, the default SMBIOS information in the BIOS code loaded from the first storage block to the second memory will be partially updated according to the specific SMBIOS information set by the user. As a result, the purpose of using the appropriated SMBIOS information to initiate the computer system can be achieved.

Abstract: The present invention discloses a method for protecting data in a hard disk, such that when a computer executes a power-on self test (POST) of a basic input/output system (BIOS), completes initialization of memories and calls an interrupt routine of the BIOS to read a hard disk area after initialization program codes of interface devices of all hard disk are executed, the computer will determine whether or not the hard disk has added a protection description data with a portion that matches with a computer identification code of the computer before accessing data in the hard disk.

Abstract: A computer platform operating system compatibility management method and system is proposed, which is designed for use in conjunction with a computer platform, such as a network server, for the computer platform to be selectively bootable between an old-version operating system (such as Windows NT4.0) and a new-version operating system (such as Windows Server 2003 or Windows 2000). This feature allows the customer to selectively install either an old-version operating system or an new-version operating system successfully onto the server, and allow both old-version operating system and new-version operating system to be compatible with the hardware of the server.

Abstract: An optimized peripheral device configuration data sequential handling method and system is proposed, which is designed for use with a computer platform for providing the computer platform an optimized configuration data sequential handling function, which is characterized by the capability of performing a runtime data amount computing procedure for each set of the OPROM-embedded original configuration data from each connected peripheral device, such that an optimal handling sequence can be determined based on the runtime data amount for the handling of the configuration data in shadow RAM during initialization. This feature allows a shadow RAM unit having a limited capacity to support more peripheral devices at the same time, and also allows the utilization of the storage space of a shadow RAM to be more flexible and efficient.

Abstract: The present invention discloses a method for protecting data in a hard disk, such that when a computer executes a power-on self test (POST) of a basic input/output system (BIOS), completes initialization of memories and calls an interrupt routine of the BIOS to read a hard disk area after initialization program codes of interface devices of all hard disk are executed, the computer will determine whether or not the hard disk has added a protection description data with a portion that matches with a computer identification code of the computer before accessing data in the hard disk.

Abstract: A computer platform memory access control method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing the server with a memory access control function with a memory configuration automatic setting capability, which is characterized by the arrangement of a configuration data exchange path between a memory control chip and an I/O control chip on the server's motherboard, so as to allow a set of memory specification data stored in an I/O configuration register of the ICH I/O control chip to be mapped via the configuration data exchange path to a memory configuration register of the memory control chip, such that a memory access action can be performed based on the memory specification data mapped from the I/O control chip. This feature allows the operation and network management of servers to be made more efficient.

Abstract: In a method of integrating image and release note of BIOS, a memory space such as flash ROM used for storing machine codes of the BIOS is planned at least one independent block with a specific length, and each block is used for storing a release note of the BIOS. All release notes of the BIOS are compiled into at least one independent binary module, and the binary module is compressed according to actual requirements. In the process of building the BIOS, the compressed binary module is placed in the image of the BIOS, and the image of the BIOS is written into each block. When a setup utility of the BIOS is executed, all release notes of the BIOS can be displayed through an output device, so that a user can select and search a related item of each release note through an input device such as a keyboard.

Abstract: A method for executing the power on self test (POST) on the computer system and a method for updating the SMBIOS information partially are provided for a computer system with a first memory and a second memory, wherein the first memory comprises a first storage block and a second storage block. A user can previously set the specific SMBIOS information in the second storage block. And during the POST stage, the default SMBIOS information in the BIOS code loaded from the first storage block to the second memory will be partially updated according to the specific SMBIOS information set by the user. As a result, the purpose of using the appropriated SMBIOS information to initiate the computer system can be achieved.

Abstract: A computer platform automatic testing method and system is proposed, which is designed for use in conjunction with a computer platform for performing an automatic testing procedure on a computer-dedicated circuit unit installed on the computer platform, and which is characterized by the capability of performing an automatic testing procedure on a computer-dedicated circuit unit based on a user-specified set of hardware specification data about the computer platform and circuit unit under test, and the capability of automatically generating a test report that lists related data about each faulted part of the circuit unit being tested. This feature allows hardware engineers to more conveniently and efficiently correct faulted parts in the circuit unit being tested.

Abstract: An initialization picture displaying method is applicable to a server such as a network-attached storage (NAS) server without a display chip for remotely displaying working messages of the server. The initialization picture displaying method includes (1) utilizing a chipset to reserve a region of a memory as a display chip buffer, (2) initializing an option ROM completely, and (3) after the option ROM is initialized completely releasing the reserved region of the memory. Therefore, even if the server does not have any display chip, the NAS sever can still correctly remotely display an initialization picture of an option ROM.

Abstract: An optimized peripheral device configuration data sequential handling method and system is proposed, which is designed for use with a computer platform for providing the computer platform an optimized configuration data sequential handling function, which is characterized by the capability of performing a runtime data amount computing procedure for each set of the OPROM-embedded original configuration data from each connected peripheral device, such that an optimal handling sequence can be determined based on the runtime data amount for the handling of the configuration data in shadow RAM during initialization. This feature allows a shadow RAM unit having a limited capacity to support more peripheral devices at the same time, and also allows the utilization of the storage space of a shadow RAM to be more flexible and efficient.

Abstract: A computer platform memory access control method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing the server with a memory access control function with a memory configuration automatic setting capability, which is characterized by the arrangement of a configuration data exchange path between a memory control chip and an I/O control chip on the server's motherboard, so as to allow a set of memory specification data stored in an I/O configuration register of the ICH I/O control chip to be mapped via the configuration data exchange path to a memory configuration register of the memory control chip, such that a memory access action can be performed based on the memory specification data mapped from the I/O control chip. This feature allows the operation and network management of servers to be made more efficient.

Abstract: A heat dissipating method is applied to a computer system having a timing signaling mechanism and a temperature sensing unit. Firstly, a process of setting a dissipating temperature operating mode is performed. Then, a periodic signal is regularly transmitted to a basic input output system by the timing signaling mechanism of the computer system, and a temperature of each of hardware devices is regularly sensed by the temperature sensing unit. Subsequently, a heat dissipating unit of each of the hardware devices is actuated to perform a heat dissipation process according to the temperature sensed by the temperature sensing unit and the dissipating temperature operating mode. Therefore, the present invention can control operating intensity of the heat dissipating units and achieve hardware monitoring without requiring additional software or hardware, such that heat dissipating and operation efficiencies of the hardware devices of the computer system can be improved.

Abstract: A memory reliability detection system and a memory reliability detection method are applied in a computer device to perform a detection process on a motherboard according to a basic input/output system (BIOS) program during power-on of the computer device, so as to allow the computer device to successfully enter an operating system and steadily operate as well as perform an initialization procedure according to the BIOS program. The computer device is allowed to read a parameter of a dual in-line memory module (DIMM) on the motherboard to perform the detection process. If a detection result does not satisfy a predetermined requirement, the DIMM is problematic and recorded in a storage unit, such that the computer device can identify and ignore the problematic DIMM according to the record after power-on, thereby preventing an influence on operation stability of the computer device due to reading the problematic DIMM during operation.

Abstract: A method for controlling access for a DRAM module applicable to a substrate provided with at least a DRAM module slot of either a first or second specification, a memory controller and a BIOS program is proposed. Thus, access control for first and second DRAM modules installed in the DRAM module slots can be performed. The first and second DRAM module related data is pre-stored by the BIOS program. Then, a memory initialization process is performed by the substrate according to the BIOS program, such that the memory controller access the DRAM module provided on the substrate during the memory initialization process, and serial present detect (SPD) data of the DRAM module is read using an I2C protocol via a system management (SM) bus, so as to determine whether the DRAM module installed in the DRAM module slot is the first DRAM module or the second DRAM module according to a value in a memory type field of the SPD data.

Abstract: A computer platform operating system compatibility management method and system is proposed, which is designed for use in conjunction with a computer platform, such as a network server, for the computer platform to be selectively bootable between an old-version operating system (such as Windows NT4.0) and a new-version operating system (such as Windows Server 2003 or Windows 2000). This feature allows the customer to selectively install either an old-version operating system or an new-version operating system successfully onto the server, and allow both old-version operating system and new-version operating system to be compatible with the hardware of the server.

Abstract: A heat dissipating method is applied to a computer system having a timing signaling mechanism and a temperature sensing unit. Firstly, a process of setting a dissipating temperature operating mode is performed. Then, a periodic signal is regularly transmitted to a basic input output system by the timing signaling mechanism of the computer system, and a temperature of each of hardware devices is regularly sensed by the temperature sensing unit. Subsequently, a heat dissipating unit of each of the hardware devices is actuated to perform a heat dissipation process according to the temperature sensed by the temperature sensing unit and the dissipating temperature operating mode. Therefore, the present invention can control operating intensity of the heat dissipating units and achieve hardware monitoring without requiring additional software or hardware, such that heat dissipating and operation efficiencies of the hardware devices of the computer system can be improved.

Abstract: A computer platform automatic testing method and system is proposed, which is designed for use in conjunction with a computer platform for performing an automatic testing procedure on a computer-dedicated circuit unit installed on the computer platform, and which is characterized by the capability of performing an automatic testing procedure on a computer-dedicated circuit unit based on a user-specified set of hardware specification data about the computer platform and circuit unit under test, and the capability of automatically generating a test report that lists related data about each faulted part of the circuit unit being tested. This feature allows hardware engineers to more conveniently and efficiently correct faulted parts in the circuit unit being tested.