Patents by Inventor Ling Li
Ling Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260267355Abstract: The present disclosure discloses a control method of a rigid-flexible integrated aerial contact operation robot.Type: ApplicationFiled: December 23, 2025Publication date: September 10, 2026Applicant: Hunan UniversityInventors: Hang Zhong, Jiacheng Liang, Yaonan Wang, Ling Li, Ge Chen, Caixia Zhang, Yexin Fan, Hui Zhang, Hean Hua, Weixing Peng, Yiming Jiang
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Publication number: 20260271261Abstract: Disclosed in the present disclosure are a semiconductor structure and a memory. The semiconductor structure comprises a first transistor. In the first transistor, a first semiconductor channel is arranged around the outer side of a first gate electrode; a first source drain electrode is arranged around a first end of the first gate electrode and is located outside of the first semiconductor channel; and a second source drain electrode is arranged around a second end of the first gate electrode and is located outside of the first semiconductor channel.Type: ApplicationFiled: August 24, 2022Publication date: September 10, 2026Applicant: INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCESInventors: Di GENG, Ling LI, Ming LIU, Xinlv DUAN, Congyan LU
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Patent number: 12730693Abstract: The present application belongs to the technical field of POS machines, and particularly relates to a communication method for dual CPUs in a POS machine, a system and a medium. The communication method comprises: a security CPU receives a target service calling request initiated by a general CPU; the security CPU controls, according to the target service calling request, a client of a remote file system to initiate to a server of the remote file system a target service execution request, so that after receiving the target service execution request, the server of the remote file system can execute a target service on a storage module of the general CPU side, and send the execution result to the client of the remote file system; and the security CPU returns the execution result received by the client of the remote file system to the general CPU.Type: GrantFiled: July 27, 2023Date of Patent: September 8, 2026Assignee: PAX COMPUTER TECHNOLOGY (SHENZHEN) CO., LTD.Inventors: Lihong Xie, Ling Li
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Publication number: 20260251500Abstract: A spectral radiance source includes: a first integrating sphere, a second integrating sphere, an optical fiber, a hollow connecting column, a baffle, and a light source. The second integrating sphere is arranged inside the first integrating sphere and connected to the first integrating sphere via the hollow connecting column. The optical fiber is arranged within the hollow connecting column, and extends between the light source and a light entry port on the second integrating sphere. The baffle is inside the second integrating sphere and arranged between the light entry port and a second light exit port. The spectral radiance source may be used to calibrate an optical instrument.Type: ApplicationFiled: February 13, 2026Publication date: August 27, 2026Inventors: Zhifeng Wu, Caihong Dai, Ling Li, Ruoduan Sun, Yanfei Wang
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Publication number: 20260252400Abstract: A memory management method and an electronic device, where the method includes: detecting a running status of a first application; and processing, when detecting that the running status of the first application is switched from a first running status to a second running status, a partial memory referenced by the first application, where the partial memory is a memory associated with a target service of the first application, and the target service is a non-critical service of the first application in the second running status.Type: ApplicationFiled: July 26, 2023Publication date: August 27, 2026Inventors: Kecheng Ji, Jinxuan Fang, Lin Wang, Ling Li
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Patent number: 12717077Abstract: In some embodiments, a head-mounted, near-eye display system comprises a stack of waveguides having integral spacers separating the waveguides. The waveguides may each include diffractive optical elements that are formed simultaneously with the spacers by imprinting. The spacers are disposed on one major surface of each of the waveguides and indentations are provided on an opposite major surface of each of the waveguides. The indentations are sized and positioned to align with the spacers, thereby forming a self-aligned stack of waveguides. Tops of the spacers may be provided with light scattering features, anti-reflective coatings, and/or light absorbing adhesive to prevent light leakage between the waveguides. As seen in a top-down view, the spacers may be elongated along the same axis as the diffractive optical elements. The waveguides may include structures (e.g.Type: GrantFiled: December 22, 2023Date of Patent: August 25, 2026Assignee: Magic Leap, Inc.Inventors: Christophe Peroz, Chieh Chang, Sharad D. Bhagat, Victor Kai Liu, Roy Matthew Patterson, David Carl Jurbergs, Mohammadreza Khorasaninejad, Ling Li, Michael Nevin Miller, Charles Scott Carden
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Patent number: 12720053Abstract: An image encoding/decoding method and apparatus are provided. An image decoding method performed by an image decoding apparatus may include obtaining a current block by splitting an image, determining a prediction mode of the current block, generating an intra prediction block of the current block, based on the prediction mode of the current block being an intra prediction mode, generating a residual block of the current block, and reconstructing the current block based on the prediction block and the residual block of the current block.Type: GrantFiled: February 24, 2025Date of Patent: August 25, 2026Assignee: LG ELECTRONICS INC.Inventors: Ling Li, Jung Hak Nam
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Patent number: 12720087Abstract: A bitstream that includes visual media data is processed according to a format rule. The bitstream includes coding information for a current picture, the coding information indicating that a geometric merge mode is enabled for a coding level higher than a picture level of the current picture and a maximum number of merge candidates satisfies a condition. The format rule specifies that maximum number of geometric merge mode candidates information in the coding information indicates a maximum number of geometric merge mode merge candidates, the maximum number of geometric merge mode candidates information indicating a relation between the maximum number of geometric merge mode merge candidates and the maximum number of merge candidates. The maximum number of geometric merge mode merge candidates is determined by subtracting a value indicated by the maximum number of geometric merge mode candidates information from the maximum number of merge candidates.Type: GrantFiled: August 2, 2024Date of Patent: August 25, 2026Assignee: Tencent America LLCInventors: Ling Li, Xiang Li, Guichun Li, Shan Liu
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Publication number: 20260234064Abstract: Provided is a ZrO2—CaO—C based refractory material which is capable of maintaining high adhesion resistance over a long period of time, while exhibiting significant slaking resistance, and suppressing self-fluxing, i.e., exhibiting corrosion-erosion resistance. The refractory material comprises a CaO—ZrO2 composition containing a CaO component in an amount of 40% by mass to 60% by mass, wherein a mass ratio of the CaO component to a ZrO2 component is 0.67 to 1.5, and wherein the CaO—ZrO2 composition includes a eutectic microstructure of CaO crystals and CaZrO3 crystals, wherein a width of each of the CaO crystals observable in a cross-sectional microstructure is 50 ?m or less.Type: ApplicationFiled: March 5, 2026Publication date: August 13, 2026Applicant: KROSAKIHARIMA CORPORATIONInventors: Ling LI, Katsumi MORIKAWA, Akinari SASAKI, Shigefumi MATSUMOTO
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Patent number: 12698242Abstract: Disclosed are a sagger for sintering lithium composite transition metal oxide and a preparation method thereof. The sagger includes a substrate layer and a shallow layer on a surface of the substrate layer, and a coating layer. The substrate layer is prepared from the following raw materials: silicon carbide, magnesia-alumina spinel, aluminum oxide-magnesium oxide-yttrium oxide composite fiber, zircon powder and a binding agent; the shallow layer is prepared from the following raw materials: silicon carbide, magnesia-alumina spinel, aluminum oxide-titanium oxide composite fiber, yttrium oxide-zirconium oxide composite fiber and a binding agent; and the coating layer is prepared from the following raw materials: silicon carbide, magnesia-alumina spinel, magnesium oxide, zirconium oxide fiber, lithium composite transition metal oxide powder and a binding agent. The sagger of the present disclosure has properties of good corrosion resistance and a small coefficient of thermal expansion.Type: GrantFiled: June 15, 2023Date of Patent: August 4, 2026Assignees: GUANGDONG BRUNP RECYCLING TECHNOLOGY CO., LTD., HUNAN BRUNP RECYCLING TECHNOLOGY CO., LTD., HUNAN BRUNP EV RECYCLING CO., LTD.Inventors: Bin Li, Dingshan Ruan, Shenghe Tang, Ling Li, Xingyu Wu, Changdong Li
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Patent number: 12696601Abstract: A driving backplate, a display panel, and a display device. The driving backplate comprises: a base substrate, comprising a display area and a fan-out area located on at least one side of the display area. The display comprises a plurality of pixel units arranged in an array, and a plurality of signal lines connected to the pixel units, and the plurality of signal lines extend in a first direction; the fan-out area comprises fan-out lines, the fan-out lines are connected to the signal lines, the fan-out line comprises a first end proximate to the display area and a second end distant from the display area, and the width of the first end is greater than the width of the second end; at least one signal line is connected to at least one fan-out line by means of a connecting line, and the connecting line extends in a second direction.Type: GrantFiled: January 28, 2021Date of Patent: July 28, 2026Assignee: BOE Technology Group Co., Ltd.Inventors: Xiaoyan Zhu, Xinhong Lu, Ling Li, Hua Huang
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Patent number: 12679057Abstract: Methods are disclosed for fabricating molds for forming eyepieces having waveguides with integrated spacers. The molds are formed by etching deep holes (e.g., 5 ?m to 1000 ?m deep) into a substrate using a wet etch or dry etch. The etch masks for defining the holes may be formed with a thick metal layer and/or multiple layers of different metals. A resist layer may be disposed over the etch mask. The resist layer may be patterned to form a pattern of holes, the pattern may be transferred to the etch mask, and the etch mask may be used to transfer the pattern into the underlying substrate. The patterned substrate may be utilized as a mold onto which a flowable polymer may be introduced and allowed to harden. Hardened polymer in the holes may form integrated spacers. The hardened polymer may be removed from the mold to form a waveguide with integrated spacers.Type: GrantFiled: November 10, 2023Date of Patent: July 14, 2026Assignee: Magic Leap, Inc.Inventors: Mauro Melli, Chieh Chang, Ling Li, Melanie Maputol West, Christophe Peroz, Ali Karbasi, Sharad D. Bhagat, Brian George Hill
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Patent number: 12684165Abstract: A method, performed by a digital device, for processing an image service according to the present document comprises the steps of: receiving image information; decoding a first image on the basis of the image information; processing the decoded first image to be displayed on a first area of a display screen; and processing a second image to be displayed on a second area of the display screen.Type: GrantFiled: September 12, 2024Date of Patent: July 14, 2026Assignee: NOKIA TECHNOLOGIES OYInventors: Ling Li, Jin Heo, Seunghwan Kim
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Publication number: 20260197277Abstract: This application discloses a packet processing method and a related device. A first communication apparatus obtains a hash key value based on an obtained first packet, and obtains a first path selecting parameter of a flow corresponding to the first packet; and the first communication apparatus determines, based on the hash key value and the first path selecting parameter, a first path for sending the first packet, and sends the first packet through the first path.Type: ApplicationFiled: March 6, 2026Publication date: July 9, 2026Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Jie Li, Zhigang Ji, Shixing Liu, Ling Li, Yijin Zhou, Xuemin Chen, Songlin Wang
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Patent number: 12671839Abstract: A video decoding method performed by a decoding apparatus according to the present document comprises the steps of: receiving a bit stream including residual information of a current block; deriving a specific number of the number of context encoding bins for context syntax elements for a current sub-block of the current block; decoding the context syntax elements for the current sub-block included in the residual information on the basis of the specific number; deriving transform coefficients for the current sub-block on the basis of the decoded context syntax elements; deriving residual samples for the current block on the basis of the transform coefficients; and generating a reconstructed picture on the basis of the residual samples.Type: GrantFiled: January 16, 2025Date of Patent: June 30, 2026Assignee: Rosedale Dynamics LLCInventors: Jungah Choi, Sunmi Yoo, Jin Heo, Jangwon Choi, Ling Li, Seunghwan Kim, Jaehyun Lim
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Patent number: 12664411Abstract: A neural network accelerator includes 2n multiplier circuits, 2n shifter circuits and an adder tree circuit. Each respective multiplier circuit multiplies a first value by a second value to output a first product value. Each respective first value is represented by a first predetermined number of bits beginning at a most significant bit of the first value having a value equal to 1. Each respective second value is represented by a second predetermined number of bits, and each respective first product value is represented by a third predetermined number of bits. Each respective shifter circuit receives the first product value of a corresponding multiplier circuit and left shifts the corresponding product value by the first predetermined number of bits to form a respective second product value. The adder circuit adds each respective second product value to form a partial-sum value represented by a fourth predetermined number of bits.Type: GrantFiled: January 18, 2022Date of Patent: June 23, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ling Li, Ali Shafiee Ardestani
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Patent number: 12663652Abstract: In some embodiments, a near-eye, near-eye display system comprises a stack of waveguides having pillars in a central, active portion of the waveguides. The active portion may include light outcoupling optical elements configured to outcouple image light from the waveguides towards the eye of a viewer. The pillars extend between and separate neighboring ones of the waveguides. The light outcoupling optical elements may include diffractive optical elements that are formed simultaneously with the pillars, for example, by imprinting or casting. The pillars are disposed on one or more major surfaces of each of the waveguides. The pillars may define a distance between two adjacent waveguides of the stack of waveguides. The pillars may be bonded to adjacent waveguides may be using one or more of the systems, methods, or devices herein. The bonding provides a high level of thermal stability to the waveguide stack, to resist deformation as temperatures change.Type: GrantFiled: December 21, 2021Date of Patent: June 23, 2026Assignee: MAGIC LEAP, INC.Inventors: Ling Li, Christophe Peroz, Chieh Chang, Sharad D. Bhagat, Ryan Jason Ong, Ali Karbasi, Stephen Richard Rugg, Mauro Melli, Kevin Messer, Brian George Hill, Melanie Maputol West
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Publication number: 20260173346Abstract: Provided is a three-dimensional dynamic random access memory, relating to the technical field of memory. The three-dimensional dynamic random access memory includes a plurality of memory cells arranged in a three-dimensional array and a dielectric structure configured to isolate the memory cells. Each memory cell includes a transistor and a capacitor. The transistor includes a gate, a gate dielectric layer, a channel region, a source region, and a drain region; a length direction of the channel region is parallel to a second direction, and two sidewalls of the channel region along the length direction are recessed inward relative to sidewalls of a corresponding first dielectric portion to form a notch. The source region and the drain region cover inner walls of the notch.Type: ApplicationFiled: February 5, 2026Publication date: June 18, 2026Applicant: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCESInventors: Guanhua YANG, Xuanming ZHANG, Fuxi LIAO, Ling LI
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Publication number: 20260172552Abstract: An image decoding method is disclosed. The image decoding method includes obtaining intra prediction mode information of a current block from a bitstream, determining an intra prediction mode of the current block based on the intra prediction mode information and an intra prediction mode of a neighboring block located around the current block, deriving a value of a first filter flag for use of filtering of an intra prediction reference sample of the current block based on coding parameters for the current block, selecting an interpolation filter to be used for intra prediction of the current block based on the first filter flag, and generating an intra prediction block of the current block using the selected interpolation filter.Type: ApplicationFiled: February 10, 2026Publication date: June 18, 2026Inventors: Ling LI, Jin HEO
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Publication number: 20260173347Abstract: The present disclosure provides a semiconductor memory device including a substrate, a plurality of capacitor structures, an insulating layer, and at least one interface layer. The capacitor structures are separately disposed on the substrate, and each of the capacitor structures includes a plurality of capacitors. The insulating layer is disposed on the substrate to cover the capacitor structures. The interface layer is disposed within the insulating layer, between any two adjacent ones of the capacitor structures, wherein a tip portion of the at least one interface layer is higher than a top surface of each of the capacitor structures. In this way, the stress mode of the substrate may be adjusted through disposing the interface layer, so as to achieve the effect of eliminating redundant stress, and to improve the structural reliability of the device.Type: ApplicationFiled: February 9, 2026Publication date: June 18, 2026Applicant: Fujian Jinhua Integrated Circuit Co., Ltd.Inventors: Liandie Zhuang, Ronghui Lin, Ling Li, Wen-Yi Teng, Tsun-Min Cheng