Abstract: A display substrate, comprising: a base, a plurality of first light-emitting units and a plurality of second light-emitting units and a plurality of first pixel circuits which are located in a first display region, and a plurality of second pixel circuits located in a second display region. Each first light-emitting unit comprises at least one first light-emitting element. Each second light-emitting unit comprises at least one second light-emitting element. The at least one first light-emitting unit is adjacent to the at least one second light-emitting unit. At least one first pixel circuit is electrically connected to the at least one first light-emitting element and is configured to drive the at least one first light-emitting element to emit light. At least one second pixel circuit is electrically connected to the at least one second light-emitting element and is configured to drive the at least one second light-emitting element to emit light.

Abstract: A display panel and a display device are provided. The display panel includes a base substrate, a driving circuit layer, a light-emitting device layer, and a color film layer. Color film patterns of the color film layer includes first color film patterns, second color film patterns and third color film patterns, light-emitting regions of first color sub-pixels and light-emitting regions of second color sub-pixels are alternately arranged along a first direction to form first sub-pixel rows; light-emitting regions of third color sub-pixels are arranged along the first direction to form second sub-pixel rows. The first sub-pixel row includes a middle first sub-pixel, two adjacent second sub-pixel rows, and two outer first sub-pixel rows. The first color film pattern in the middle first sub-pixel row extends across the adjacent second sub-pixel row and further extends to the outer first sub-pixel row.

Abstract: According to one aspect, a method of operating a memory system is provided. The method may include: performing a redundant array coding operation on received user data to generate check data; allocating a first physical address for storing the user data, where the first physical address points to a first memory region of a plurality of memory regions; allocating and recording a second physical address for storing the check data, where the second physical address points to a second memory region; sending a first writing instruction including the first physical address to the memory device, where the first writing instruction may indicate to write the user data into the first memory region; sending a second writing instruction that includes the second physical address and is different from the first writing instruction to the memory device to write the check data into the second memory region.

Abstract: The display substrate comprises a display region; the display region is provided with pixel driving circuits, a plurality of gate line groups and a plurality of gate connection line groups; a non-display region is provided with gate driving circuits; the gate driving circuits are electrically connected to the gate line groups; the non-display region comprises: a frame region and a binding region which are sequentially arranged in a direction away from the display region; the frame region comprises: a first linear frame region and a second linear frame region, the first linear frame region being located on the side of the display region away from the binding region, and the second linear frame region being located on the side of the display region close to the binding region.

Abstract: A display substrate includes a substrate, scan signal lines, a plurality of first pixel circuits and a plurality of first light-emitting devices. The plurality of first pixel circuits are disposed on the substrate, and are located in a functional device setting region. At least one first pixel circuit includes a first transistor. At least one first light-emitting device includes a first electrode. The at least one first light-emitting device includes at least one first color light-emitting device, and the at least one first pixel circuit includes at least one first color pixel circuit, and a first color pixel circuit is electrically connected to a first color light-emitting device. An orthographic projection of a channel region of a first transistor in the first color pixel circuit on the substrate is at least partially overlapped with an orthographic projection of a first electrode of the first color light-emitting device on the substrate.

Abstract: A shift register, a driving method, a gate driving circuit and a display device are provided. In the shift register, a first maintenance sub-circuit is coupled to a control signal input end and a first node, and configured to substantially maintain a voltage at the first node in a first operating mode. A second maintenance sub-circuit is coupled to the control signal input end and a second node, and configured to substantially maintain a voltage at the second node in the first operating mode.

Abstract: A display panel includes a plurality of pixel units arranged in an array. Each pixel unit includes at least a first light-emitting element, two second light-emitting elements, and a third light-emitting element which are different in color. A plurality of pixel circuits correspond to the first light-emitting element, the second light-emitting elements, and the third light-emitting element in the pixel unit, respectively, and in the first light-emitting elements and the third light-emitting elements in any two adjacent odd columns, in one of the two adjacent odd columns, the pixel circuit corresponding to an nth light-emitting element is electrically connected to an (n+1)th light-emitting element, and the pixel circuit corresponding to an (n+1)th light-emitting element is electrically connected to the nth light-emitting element, where n is an odd number.

Abstract: A display panel includes a substrate, and a plurality of first pixel circuits, a plurality of first light-emitting devices and a plurality of first light-shielding portions that are located in a functional device setting region. The plurality of first light-emitting devices are disposed on a side of the plurality of first pixel circuits away from the substrate. A first light-emitting device includes a first electrode electrically connected to a first pixel circuit. The plurality of first light-shielding portions are arranged at intervals on a side of the plurality of first light-emitting devices away from the substrate. Each first light-shielding portion is provided with a first opening therein, and each first opening corresponds to a single first light-emitting device. An orthographic projection of a first portion of the first pixel circuit on the substrate is located within an orthographic projection of a first light-shielding portion on the substrate.

Abstract: An array substrate is provided. The array substrate includes a second signal line layer including a plurality of signal lines on a base substrate; an anode layer on a side of the second signal line layer away from the base substrate; a pixel definition layer on a side of the anode layer away from the second signal line layer; and a plurality of light transmissive apertures extending through the pixel definition layer, the plurality of light transmissive apertures spaced apart from each other. At least one of the plurality of signal lines includes a first segment extending along a first direction, and a second segment. An orthographic projection of a central line of the first segment extending along the first direction on the base substrate intersects with an orthographic projection of at least one light transmissive aperture of the plurality of light transmissive apertures on the base substrate.

Abstract: A display substrate includes a substrate, and first active layers, a first functional layer, a second active layer, a second functional layer and an interlayer dielectric layer stacked in sequence on the substrate. The display substrate further includes first vias, second vias and third vias. The first vias each penetrate at least a portion of the second functional layer and at least a portion of the first functional layer, and each expose a partial surface of a first active layer. The second vias each penetrate the interlayer dielectric layer, and are respectively communicated with the first vias. The third vias each penetrate the interlayer dielectric layer and at least another portion of the second functional layer, and each expose a partial surface of the second active layer. The first vias are formed before the interlayer dielectric layer, and the third vias are formed later than the interlayer dielectric layer.

Abstract: A display substrate and a display device are provided. The display substrate includes sub-pixels, first data lines, and first power signal lines. The sub-pixel includes a light emitting element including a second electrode. The sub-pixel includes a first connecting portion including a first sub-connecting portion and a first block. The second electrode is overlapped with the first data line, the first power signal line and the first connecting portion, the first power signal line and the first data line are located at both sides of the first connecting portion. A ratio of a minimum distance between edges of the first sub-connecting portion and the first data line which are close to each other to a minimum distance between edges of the first block and the first power signal line which are close to each other is in a range from 0.8 to 1.2.

Abstract: Methods, systems, and devices for address mappings for random access operations are described. A portion of a L2P table may be loaded (e.g., to a buffer) upon receiving a write command (e.g., a random write command). In some instances, one or more entries (e.g., one or more mappings) included in the portion of the L2P table may be updated based on the write command. The portion of the L2P table may be maintained in the buffer during subsequent access operations, such as random read operations. The subsequent access operations may utilize the portion of the L2P table to access a memory device.

Abstract: Provided are a pixel driving circuit, a display panel and a driving method. The pixel driving circuit includes: a driver transistor, a light-emitting device, a compensation capacitor, a threshold compensation sub-circuit, a data writing sub-circuit, a conduction control sub-circuit and a light-emitting control sub-circuit. The threshold compensation sub-circuit, in response to a signal at the compensation signal terminal, provides the threshold voltage of the driver transistor to the first end of the compensation capacitor; the conduction control sub-circuit, in response to the signal at the conduction control terminal, establishes the conducting path between the power signal terminal and the second end of the compensation capacitor; and the light-emitting control sub-circuit, in response to the signal at the light-emitting control signal terminal, provides the drive current generated by the driver transistor to the light-emitting device.

Abstract: A display substrate, a manufacturing method therefor, and a display apparatus are disclosed. The display substrate includes a display area (100), a bonding area (200) and a bezel area (300). On a plane perpendicular to the display substrate, the display substrate includes a base substrate (101) and a driving circuit layer (102). The substrate (101) at least includes a base conductive layer disposed between a first flexible layer (10A) and a second flexible layer (10C), the base conductive layer at least includes a first connection line (70), the driving circuit layer (102) at least includes a data signal line (60) and a second connection line (80), the second connection line (80) is connected to the first connection line (70) through a first lapping via (DV1), the data signal line (60) is connected to the second connection line (80) through a second lapping via (DV2).

Abstract: The present disclosure relates to the field of display technology, and provides a display panel and a display device. The display panel includes a first display area and a second display area, and further includes a plurality of first pixel islands. The first pixel islands are in the first display area and include: at least one first light-emitting unit; at least one first pixel driving circuit, arranged in a one-to-one correspondence with the at least one first light-emitting unit, and configured to provide a driving current to a first light-emitting unit corresponding thereto; and a plurality of first signal line segments configured to provide signals to the at least one first pixel driving circuit.

Abstract: The present disclosure provides a display substrate, a display apparatus and a manufacturing method of a display substrate, including a base substrate; a plurality of sub-pixels are arranged in array on the base substrate, where at least one of the sub-pixels includes at least two light-emitting regions, and light-emitting regions of different sub-pixels are arranged in isolation in the first direction and the second direction, the first direction is an anti-peeping direction, and the second direction is perpendicular to the first direction; and a plurality of light-shielding structures arranged at a light-emitting side of the plurality of sub-pixels, where an orthographic projection of the light-shielding structure on the base substrate extends in the second direction between adjacent light-emitting regions, and the orthographic projection of the light-shielding structure on the base substrate and a corresponding light-emitting region have a first distance in the first direction.

Abstract: Disclosed are a display substrate, a display apparatus and an electronic apparatus, the display substrate includes a base substrate and a plurality of sub-pixels disposed on the base substrate, at least one sub-pixel includes a pixel drive circuit, at least one pixel drive circuit includes a plurality of first-type transistors (M1) and a plurality of second-type transistors (M2), an orthographic projection of at least one first-type transistor (M1) on the base substrate is at least partially overlapped with an orthographic projection of at least one second-type transistor (M2) on the base substrate.

Abstract: A pixel circuit includes a driving sub-circuit, a first voltage writing sub-circuit, a second voltage writing sub-circuit, a writing control sub-circuit, a coupling sub-circuit, a first reset sub-circuit, and a storage sub-circuit. The first voltage writing sub-circuit is configured to write a data signal provided by the data line (DL) to a third node (N3) under the control of a first scan line (GL1) in a data writing stage. The second voltage writing sub-circuit is configured to write a threshold voltage of the driving sub-circuit to the third node (N3) under the control of a compensation control line (GP) in a threshold compensation stage. The writing control sub-circuit is configured to conduct the third node (N3) and a fourth node (N3). The coupling sub-circuit is configured to couple a signal written to the fourth node (N4) to the first node (N1).

Abstract: A display substrate includes a plurality of circuit units, and at least one circuit unit includes a pixel driving circuit, a sensing circuit and a photosensitive device, wherein the pixel driving circuit includes at least one light emitting control transistor, the sensing circuit at least includes a sensing control transistor, the sensing control transistor is connected to the photosensitive device, the light emitting control transistor and the sensing control transistor are different types of transistors; and in the at least one circuit unit, the light emitting control transistors and the sensing control transistors are connected to the same light emitting signal line.

Abstract: The embodiments of the present disclosure provide a display panel, a display device and a driving control method. The display panel includes: a shift register unit and output control signal lines coupled to the shift register unit, where the output control signal lines are disposed between the shift register unit coupled thereto and a display region of the display panel, and the shift register unit includes: a shift register, configured to output a cascade signal through a cascaded output terminal; an output circuit, coupled to the shift register, and configured to control a driving output terminal to output a gate scanning signal according to a signal of an output control signal terminal and a signal of a first reference signal terminal, where the output control signal terminal is coupled to one of the output control signal lines.