Abstract: A pixel circuit includes: data writing sub-circuit coupled to data signal terminal, scanning signal terminal and fourth node; first light-emitting control sub-circuit coupled to first voltage terminal, first light-emitting control terminal and second node; driving sub-circuit coupled to first node, the second node and third node; storage sub-circuit coupled to the first node and the fourth node; compensation sub-circuit coupled to compensation signal terminal, the first node and the third node; second light-emitting control sub-circuit coupled to the third node, second light-emitting control terminal, and an electrode of light-emitting element; first initialization sub-circuit coupled to first reset signal terminal, first initialization signal terminal and the fourth node; second initialization sub-circuit coupled to second reset signal terminal, second initialization signal terminal and an electrode of the light-emitting element; third initialization sub-circuit coupled to third reset signal terminal, third

Abstract: A display panel includes a substrate, pixel circuits and anodes. A row of pixel circuits is divided into pixel circuit groups, and a group includes a first pixel circuit and a second pixel circuit. In the same group, a first pixel circuit is symmetrical with a second pixel circuit about a first axis. Each pixel circuit includes and overlapping portion. Overlapping portions of the first and second pixel circuits are a first overlapping portion and second overlapping portion. Along a second direction, a minimum distance between the first and second overlapping portions in the same group is a first distance, where the second direction is a row direction in which the pixel circuits are arranged. Along the second direction, a minimum distance between adjacent first and second overlapping portions belonging to different groups is a second distance, and the first distance is less than the second distance.

Abstract: A display substrate and a display device are provided. The display substrate includes sub-pixels including a light emitting element and a pixel circuit, the light emitting element includes a second electrode including a main body electrode. The sub-pixels include a first color sub-pixel which includes a first connecting portion. In the first color sub-pixel, the connecting electrode is connected with the first connecting portion through a first via hole, and the first connecting portion is electrically connected with the pixel circuit through a first connecting hole; and the first via hole and the first connecting hole are not overlapped with the main body electrode, and orthographic projections of the first via hole and the first connection hole on a first straight line extending in an extension direction of the data line are overlapped.

Abstract: A display substrate and a manufacturing method therefor, and a display apparatus are provided. The display substrate includes a plurality of circuit units, a scan signal line for providing a scan signal for the circuit units, and a first power supply line (51) for providing a power supply signal; wherein at least one circuit unit includes a pixel drive circuit, the pixel drive circuit includes a first shield electrode (34), which is connected to the first power supply line (51), an orthographic projection of the first shield electrode (34) on a plane of the display substrate at least partially overlaps an orthographic projection of the scan signal line on the plane of display substrate.

Abstract: A display substrate and a display device. The display substrate includes a plurality of sub-pixel groups and a plurality of signal line groups. The plurality of signal line groups are arranged along a first direction and are spaced apart from each other, each of the signal line groups includes at least one signal line, and the signal line extends along a second direction intersecting the first direction. Each of the sub-pixel groups includes a first sub-pixel, and the first sub-pixel includes a first anode and a first effective light-emitting region, the first anode includes a first main portion, and the first main portion at least partially overlaps with the first effective light-emitting region, a size of the first main portion in the first direction is larger than a size of the first main portion in the second direction, and the first anode overlaps with two adjacent signal line groups.

Abstract: A pixel circuit includes a drive sub-circuit, a write sub-circuit, a compensation sub-circuit, a first reset sub-circuit, a second reset sub-circuit and a light-emitting element. The drive sub-circuit is configured to provide a drive signal to a third node in response to signals of the first node and the second node; the write sub-circuit is configured to write the signal of the data signal line to the second node or the third node under a control of a signal of a first scanning signal line; the compensation sub-circuit is configured to compensate a voltage at the first node under the control of the signal of the first scanning signal line.

Abstract: A display panel and a display device are described. The display panel includes a first display area, the first display area includes a first external area and a first compression area, and the first compression area is located at a side in a first direction of the first external area, wherein the first direction is parallel to the data line. The display panel further includes a plurality of first light-emitting units and a plurality of first pixel driving circuits.

Abstract: A display substrate and a display device are disclosed. The display substrate includes a base substrate and sub-pixels arranged on the base substrate, the sub-pixel includes a sub-pixel driving circuit and a light-emitting element including an anode pattern coupled to the sub-pixel driving circuit. The display substrate further includes pixel definition patterns, at least one of which includes at least one pixel aperture, at least a portion of the light-emitting element is located in the pixel aperture, an orthographic projection of the at least one pixel definition pattern onto the base substrate covers at least a portion of an orthographic projection of the sub-pixel driving circuit onto the base substrate, and covers at least a portion of an orthographic projection of a gap between at least two adjacent sub-pixel driving circuits onto the base substrate, and the pixel definition patterns are configured to shield light.

Abstract: The present disclosure provides a display module and a display apparatus, which belong to the field of display technology and can solve the technical problem of notably insufficient space reserved for batteries in the display module that causes a notably reduced battery capacity and influences standby time of the display apparatus in the existing art. The display module of the present disclosure includes a display panel, and a driver integrated circuit and a passive device each electrically connected to the display panel. The driver integrated circuit and the passive device are packaged in a land grid array package structure. The land grid array package structure is integrated onto the display panel.

Abstract: A display panel and a display device are provided. The display panel includes a base substrate, a driving circuit layer, a light-emitting device layer, and a color film layer. Color film patterns of the color film layer includes first color film patterns, second color film patterns and third color film patterns, light-emitting regions of first color sub-pixels and light-emitting regions of second color sub-pixels are alternately arranged along a first direction to form first sub-pixel rows; light-emitting regions of third color sub-pixels are arranged along the first direction to form second sub-pixel rows. The first sub-pixel row includes a middle first sub-pixel, two adjacent second sub-pixel rows, and two outer first sub-pixel rows. The first color film pattern in the middle first sub-pixel row extends across the adjacent second sub-pixel row and further extends to the outer first sub-pixel row.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes: a base substrate including a display area and a non-display area, the non-display area including: a lead area, a bending area, and a bonding area; a plurality of touch wirings arranged on the base substrate, one end of the touch wirings being connected to the display area, and the other end extending to the bonding area via the lead area and the bending area; signal wirings including a first portion located at the lead area, a second portion located at the bending area, and a third portion located at the bonding area, the second portion including a plurality of sub-signal wirings, the plurality of sub-signal wirings being divided into a plurality of sub-signal wiring groups; where in the bending area, the touch wirings and the sub-signal wiring groups are alternately distributed in a first direction.

Abstract: A pixel circuit includes a driving transistor, a reset sub-circuit, a leakage prevention sub-circuit and a data writing sub-circuit. The reset sub-circuit is configured to, under control of a first scanning signal, transmit a reference voltage signal to a first electrode of the driving transistor. The leakage prevention sub-circuit is configured to, under control of a second scanning signal, connect the first electrode of the driving transistor to a control electrode of the driving transistor. The data writing sub-circuit is configured to, under control of a third scanning signal, transmit a data signal to a second electrode of the driving transistor. The reset sub-circuit and the data writing sub-circuit are turned on sequentially when the leakage prevention sub-circuit is turned on; and the reset sub-circuit is turned on at least once when the leakage prevention sub-circuit is turned off.

Abstract: A display substrate is provided, which includes a first display area (A1). The first display area (A1) includes a plurality of display island areas (A11), which are arranged in an array, and light-transmitting areas (A121, A122), which are located between adjacent display island areas (A11). The display island areas (All) each includes: a plurality of first pixel circuits (11) and a plurality of first light-emitting elements (13), which are provided on a base. At least one first pixel circuit (11) is electrically connected to at least one first light-emitting element (13) and is configured to drive the at least one first light-emitting element (13) to emit light. The first pixel circuits (11) in adjacent display island areas (A11) are connected by means of a plurality of first signal traces in a first direction (X).

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels arranged on the base substrate, at least one sub-pixel includes a sub-pixel driving circuit and a light-emitting element, the light-emitting element includes an anode pattern, and the anode pattern is coupled to the sub-pixel driving circuit. The display substrate further includes a plurality of pixel definition patterns, and an orthographic projection of at least one pixel definition pattern onto the base substrate at least partially overlaps with an orthographic projection of a boundary of a corresponding anode pattern onto the base substrate.

Abstract: The display substrate includes pixel regions (PD) and blank regions (PB), the pixel region (PD) includes first power supply lines (70) and a second power supply line (80), the first power supply lines (70) are configured to continuously provide high-level signals to a pixel driving circuit, and the second power supply line (80) is configured to continuously provide low-level signals to a patterned cathode (403), each blank region (PB) includes high-voltage power supply connecting lines connected to the first power supply lines (70) in the adjacent pixel regions (PD) and low-voltage power supply connecting lines connected to the second power supply lines (80) in the adjacent pixel regions (PD), the first power supply lines (70) and the high-voltage power supply connecting lines form a high-voltage power supply wiring with a mesh connection structure.

Abstract: A display substrate and a display device are provided. In the display substrate, the plurality of signal lines includes a first initialization signal line, a reset control signal line, and a second initialization signal line. The plurality of transistors include a first reset transistor and a second reset transistor, a gate electrode of the first reset transistor and a gate electrode of the second reset transistor are electrically connected with the reset control signal line, an orthographic projection of at least one of the first initialization signal line and the second initialization signal line on the base substrate does not overlap with an orthographic projection of the reset control signal line on the base substrate.

Abstract: A pixel circuit includes: data writing sub-circuit coupled to data signal terminal, scanning signal terminal and fourth node; first light-emitting control sub-circuit coupled to first voltage terminal, first light-emitting control terminal and second node; driving sub-circuit coupled to first node, the second node and third node; storage sub-circuit coupled to the first node and the fourth node; compensation sub-circuit coupled to compensation signal terminal, the first node and the third node; second light-emitting control sub-circuit coupled to the third node, second light-emitting control terminal, and an electrode of light-emitting element; first initialization sub-circuit coupled to first reset signal terminal, first initialization signal terminal and the fourth node; second initialization sub-circuit coupled to second reset signal terminal, second initialization signal terminal and an electrode of the light-emitting element; third initialization sub-circuit coupled to third reset signal terminal, third

Abstract: Provided is a display panel. The display panel includes: a base substrate, including a display region and a periphery region at least partially surrounding the display region, wherein the display region includes a first display region and a second display region disposed at least on one side of the first display region, a light transmittance of the first display region being greater than a light transmittance of the second display region; a plurality of first pixel units disposed on the base substrate and in the first display region; and a plurality of signal lines disposed at least in the first display region and electrically connected to the plurality of first pixel units, wherein the plurality of signal lines include a plurality of first signal lines and a plurality of second signal lines.

Abstract: A pixel circuit and a display apparatus are provided. The pixel circuit includes: a driving circuit, a data writing circuit, a compensation circuit, a light emission control circuit, a first reset circuit, a second reset circuit, and a light-emitting element, wherein the driving circuit includes a control end, a first end and a second end; the data writing circuit is used for writing a data signal into the first end of the driving circuit under the control of a writing control signal; the first reset circuit is used for applying a first reset voltage to the control end of the driving circuit under the control of a first reset control signal; and the second reset circuit is used for applying a second reset voltage to a first electrode of the light-emitting element under the control of a second reset control signal.

Abstract: Disclosed are a pixel circuit, a driving method thereof, and a display apparatus. The pixel circuit includes a driving sub-circuit, a writing sub-circuit, a compensation sub-circuit, a reset sub-circuit, and a light-emitting element, the driving sub-circuit provides a driving current to a third node in response to a control signal of a first node; the writing sub-circuit writes a signal of a data signal line to a second node in response to a control signal of a first scan signal line, the signal of the data signal line is a data voltage signal or a reset voltage signal; the compensation sub-circuit writes the reset voltage signal to the third node in response to a control signal of the first scan signal line; the compensation sub-circuit further compensates the first node in response to a control signal of the first scan signal line.