Patents by Inventor Linwei Ding

Linwei Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems and methods for enhanced compression of trace data in an emulation system
    Patent number: 11573883
    Abstract: A trace subsystem of an emulation system may generate differential frame data based upon successive frames. If one compression mode, the trace subsystem may set a flag bit and store differential frame data if there is at least one non-zero bit in the differential frame data. If the differential frame data includes only zero bits, the trace subsystem may set the flag bit without storing the frame data. In another compression mode, the computer may further compress the differential data if the frame data includes one (one-hot) or two (two-hot) non-zero bits. The controller may set flag bits to indicate one of all-zeroes, one-hot, two-hot, and random data conditions (more than two non-zero bits). For one-hot or two-hot conditions, the controller may store bits indicating the positions of the non-zero bits. For random data conditions, the controller may store the entire differential frame.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: February 7, 2023
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Mitchell G. Poplack, Aruna Aluri, Linwei Ding
  • Inline hardware compression subsystem for emulation trace data
    Patent number: 11176018
    Abstract: A trace subsystem of an emulation system may generate differential frame data based upon successive frames. If one compression mode, the trace subsystem may set a flag bit and store differential frame data if there is at least one non-zero bit in the differential frame data. If the differential frame data includes only zero bits, the trace subsystem may set the flag bit without storing the frame data. In another compression mode, the computer may further compress the differential data if the frame data includes one (one-hot) or two (two-hot) non-zero bits. The controller may set flag bits to indicate one of all-zeroes, one-hot, two-hot, and random data conditions (more than two non-zero bits). For one-hot or two-hot conditions, the controller may store bits indicating the positions of the non-zero bits. For random data conditions, the controller may store the entire differential frame.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: November 16, 2021
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Aruna Aluri, Linwei Ding, Mitchell G. Poplack