Abstract: Provided are a driver board, a display panel, and a display apparatus. The driver board includes a driver circuit. The driver circuit includes N pixel electrodes, N pixel switches, a data switch, and a storage capacitor, N is a positive integer, and N?2. The storage capacitor includes a reference electrode and a counter electrode. A control terminal of the pixel switch receives a gating signal, a first terminal of the pixel switch is connected to the counter electrode, and a second terminal of the pixel switch is connected to the pixel electrode. The driver board further includes data lines, and each data line is connected to the counter electrode via the data switch.

Abstract: A detection substrate including a substrate and a plurality of detection units disposed on a side of the substrate, each detection unit including at least an inorganic transistor, an organic transistor, and a photoelectric sensor element, the organic transistor including an organic semiconductor part, in a direction perpendicular to a plane of the substrate, a film layer where the organic semiconductor part is located being located on the side of the film layer where the inorganic transistor is located away from the substrate, the film layer where the organic semiconductor part is located being located on the side of a film layer where the photoelectric sensor element is located away from the substrate, the organic transistor of the detection unit being connected to a sensing electrode, the sensing electrode being located on the side of the film layer where the inorganic transistor is located away from the substrate.

Abstract: The present disclosure provides a pad structure and a testkey structure and a testing method for a semiconductor device. The pad structure includes: an insulating dielectric layer formed on a substrate; a metal interconnection structure formed in the insulating dielectric layer, the metal interconnection structure comprising a first section and a second section, which are insulated from each other; and a pad formed on the top of the insulating dielectric layer so as to be exposed therefrom at least at its top surface, electrically connected to the first section, and insulated from the second section. With this disclosure, reduced capture of plasma is achievable, mitigating adverse impact of plasma on the semiconductor device.

Abstract: The present disclosure provides a pad structure and a testkey structure and a testing method for a semiconductor device. The pad structure includes: an insulating dielectric layer formed on a substrate; a metal interconnection structure formed in the insulating dielectric layer, the metal interconnection structure comprising a first section and a second section, which are insulated from each other; and a pad formed on the top of the insulating dielectric layer so as to be exposed therefrom at least at its top surface, electrically connected to the first section, and insulated from the second section. With this disclosure, reduced capture of plasma is achievable, mitigating adverse impact of plasma on the semiconductor device.