Patents by Inventor Lionel Courau

Lionel Courau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200150174
    Abstract: An integrated circuit die has a peripheral edge and a seal ring extending along the peripheral edge and surrounding a functional integrated circuit area. A test logic circuit located within the functional integrated circuit area generates a serial input data signal for application to a first end of a sensing conductive wire line extending around the seal ring between the seal ring and the peripheral edge of the integrated circuit die. Propagation of the serial input data signal along the sensing conductive wire line produces a serial output data signal at a second end of the sensing conductive wire line. The test logic circuit compares data patterns of the serial input data signal and serial output data signal to detect damage at the peripheral edge of the integrated circuit die.
    Type: Application
    Filed: November 11, 2019
    Publication date: May 14, 2020
    Applicants: STMicroelectronics International N.V., STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: Manoj KUMAR, Lionel COURAU, GEETA, Olivier LE-BRIZ
  • Patent number: 6879205
    Abstract: An output buffer includes a pair of main complimentary MOS transistors connected to at least one additional pair of complementary MOS transistors connected in parallel to the pair of main transistors by means of a pair of switches controlled by a numeric word for activating or not activating the additional pair of transistors. A control circuit delivers the numeric word which represents the conductivity of the pair of main transistors included in the output buffer. The additional transistors are sized in such a way that when they are activated, the equivalent impedance of the output buffer is approximately constant.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: April 12, 2005
    Assignee: STMicroelectronics S.A.
    Inventor: Lionel Courau
  • Publication number: 20040012434
    Abstract: An output buffer includes a pair of main complimentary MOS transistors connected to at least one additional pair of complementary MOS transistors connected in parallel to the pair of main transistors by means of a pair of switches controlled by a numeric word for activating or not activating the additional pair of transistors. A control circuit delivers the numeric word which represents the conductivity of the pair of main transistors included in the output buffer. The additional transistors are sized in such a way that when they are activated, the equivalent impedance of the output buffer is approximately constant.
    Type: Application
    Filed: April 21, 2003
    Publication date: January 22, 2004
    Inventor: Lionel Courau