Abstract: A graphics system comprising a scheduling network, a sample buffer and a plurality of filtering units. The sample buffer is configured to store sample generated by a rendering engine. The plurality of filtering units are coupled in a linear series. Each filtering unit of the linear series is configured to send a request for a scanline of sample bins to a first filtering unit of the linear series. The first filtering unit is configured to service the scanline requests by sending burst requests to a scheduling network and coordinating the flow of samples forming the bursts from the sample buffer to the filtering units.

Abstract: A crossbar switch is disclosed. The crossbar switch comprises a plurality of input sorting units and a plurality of merge and interleave units. Each input sorting unit is capable of receiving from a respective device an access request to any one of a plurality of physical memory devices. Each merge and interleave unit is capable of arbitrating among competing access requests received from any of the input sorting units, selecting one of the competing access requests and forwarding the selected request for implementation on a respective memory device. Also disclosed is method implemented by the crossbar switch.

Abstract: A crossbar switch is disclosed. The crossbar switch comprises a plurality of input sorting units and a plurality of merge and interleave units. Each input sorting unit is capable of receiving from a respective device an access request to any one of a plurality of physical memory devices. Each merge and interleave unit is capable of arbitrating among competing access requests received from any of the input sorting units, selecting one of the competing access requests and forwarding the selected request for implementation on a respective memory device. Also disclosed is method implemented by the crossbar switch.

Abstract: A graphics system comprising a scheduling network, a sample buffer and a plurality of filtering units. The sample buffer is configured to store sample generated by a rendering engine. The plurality of filtering units are coupled in a linear series. Each filtering unit of the linear series is configured to send a request for a scanline of sample bins to a first filtering unit of the linear series. The first filtering unit is configured to service the scanline requests by sending burst requests to a scheduling network and coordinating the flow of samples forming the bursts from the sample buffer to the filtering units.

Abstract: A technique for arbitrating and selecting one access request to a shared memory from among multiple contenders is disclosed. In a first aspect, the invention includes a method for accessing a shared memory. The method includes receiving a plurality of access requests; presenting a plurality of characteristics for each access request; ascertaining a plurality of operational characteristics; and selecting one of the access requests for processing upon consideration of the access request characteristics and the operational characteristics. In a second aspect, the invention includes an arbitration and select logic (“ASL”) unit. The ASL unit comprises a plurality of input sorting units, each input sorting unit capable of receiving a respective access request and a merge and interleave unit (“MIU”).

Abstract: A technique for arbitrating and selecting one access request to a shared memory from among multiple contenders is disclosed. In a first aspect, the invention includes a method for accessing a shared memory. The method includes receiving a plurality of access requests; presenting a plurality of characteristics for each access request; ascertaining a plurality of operational characteristics; and selecting one of the access requests for processing upon consideration of the access request characteristics and the operational characteristics. In a second aspect, the invention includes an arbitration and select logic (“ASL”) unit. The ASL unit comprises a plurality of input sorting units, each input sorting unit capable of receiving a respective access request and a merge and interleave unit (“MIU”).