Patents by Inventor Lisa Weyna

Lisa Weyna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method to prevent side channel power attacks in advanced encryption standard
    Patent number: 9160523
    Abstract: Apparatus and method for obscuring round 1 power consumption of hardware implementation of the Advanced Encryption Standard (AES) algorithm. Additional hardware circuitry will provide consistent power consumption during round 1 of the AES algorithm. This prevents the opportunity to determine the AES key value during a side channel power attack.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: October 13, 2015
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Lisa Weyna, John W. Rooks
  • Apparatus and method to prevent side channel power attacks in advanced encryption standard using floating point operation
    Patent number: 9135834
    Abstract: Apparatus and method for obscuring round 1 power consumption of hardware implementation of the AES algorithm. By simultaneously executing a processor floating point operation while executing round 1 of the AES algorithm power consumption of the AddRoundKey transformation is obscured. This prevents the opportunity to determine the AES key value during a side channel power attack.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: September 15, 2015
    Assignee: The United Sates of America as represented by the Secretary of the Air Force
    Inventors: Lisa Weyna, John W. Rooks
  • APPARATUS AND METHOD TO PREVENT SIDE CHANNEL POWER ATTACKS IN ADVANCED ENCRYPTION STANDARD USING FLOATING POINT OPERATION
    Publication number: 20140321639
    Abstract: Apparatus and method for obscuring round 1 power consumption of hardware implementation of the AES algorithm. By simultaneously executing a processor floating point operation while executing round 1 of the AES algorithm power consumption of the AddRoundKey transformation is obscured. This prevents the opportunity to determine the AES key value during a side channel power attack.
    Type: Application
    Filed: January 23, 2014
    Publication date: October 30, 2014
    Inventors: Lisa Weyna, John W. Rooks
  • APPARATUS AND METHOD TO PREVENT SIDE CHANNEL POWER ATTACKS IN ADVANCED ENCRYPTION STANDARD
    Publication number: 20140321638
    Abstract: Apparatus and method for obscuring round 1 power consumption of hardware implementation of the Advanced Encryption Standard (AES) algorithm. Additional hardware circuitry will provide consistent power consumption during round 1 of the AES algorithm. This prevents the opportunity to determine the AES key value during a side channel power attack.
    Type: Application
    Filed: January 10, 2014
    Publication date: October 30, 2014
    Inventors: Lisa Weyna, John W. Rooks