Abstract: A display panel includes a first pixel driving circuit and a second pixel driving circuit. A data writing transistor and a driving transistor in the first pixel driving circuit, a driving transistor and a data writing transistor in the second pixel driving circuit are sequentially arranged. In the first pixel driving circuit, a first electrode plate of a capacitor is coupled to the driving transistor at a first coupling position and coupled to a first light-emitting device at a second coupling position located at a side of the first coupling position away from the data writing transistor. In the second pixel driving circuit, a first electrode plate of a capacitor is coupled to the driving transistor at a third coupling position and coupled to a second light-emitting device at a fourth coupling position located between the third coupling position and the data writing transistor.

Abstract: A display substrate and a display device. The display substrate includes a driving circuit layer, a first scanning line and a second scanning line. The driving circuit layer includes pixel units arranged in an array form, each pixel unit includes a plurality of sub-pixels, at least one sub-pixel includes a pixel driving circuit, the pixel driving circuit includes a first transistor and a second transistor, an active pattern of the first transistor includes a first channel region, an active pattern of the second transistor includes a second channel region, the first channel region is located on a side of the first scanning line away from the second scanning line, and the second channel region is located on a side of the second scanning line away from the first scanning line.

Abstract: A display substrate and a display device are provided. The display substrate includes: a base substrate, data lines and sub-pixels on the base substrate. The sub-pixels include a sub-pixel driving circuit and a light-emitting element including a first electrode. The sub-pixel driving circuit includes a driving transistor and a data writing transistor having a first electrode coupled to the data line through a second connection structure. A second electrode of the driving transistor is coupled to the first electrode through a first connection structure. The first and second connection structures are in a non-aperture region of the sub-pixel. Orthographic projections of the first and second connection structures onto the base substrate are arranged along a first direction. An orthographic projection of the second connection structure onto the base substrate and an aperture region of the sub-pixel are along a second direction which intersects the first direction.

Abstract: A display substrate and driving method thereof, a display device are provided. The display substrate includes: a base substrate, and a plurality of repeating units and a plurality of data lines on the base substrate, the plurality of repeating units are divided into plurality of repeating unit columns; each repeating unit includes a plurality of subpixels, the subpixel includes a subpixel driving circuit, the subpixel driving circuit includes a data writing transistor, a writing control transistor and a driving transistor; the first electrode of the data writing transistor is coupled to the corresponding data line, the second electrode of the data writing transistor is coupled to the first electrode of the writing control transistor, and the second electrode of the writing control transistor is coupled to the gate of the driving transistor.

Abstract: A display substrate including a base substrate and a driving module arranged on the base substrate, the driving module includes at least one driving unit, and the driving unit includes N stages of driving circuits; N is a positive integer, n is a positive integer less than or equal to N; the nth stage of driving circuit includes a (2n?1)th stage of output circuit, a 2nth stage of output circuit and a first node control circuit; the first node is electrically connected to the (2n?1)th stage of output circuit and the 2nth stage of output circuit respectively through a first connection line; the driving module also includes a scanning line; there are at least two mutually independent overlapping portions between the orthographic projection of the first connection line on the base substrate and the orthographic projection of the scanning line on the base substrate.

Abstract: Provided is a gate driver circuit. The gate driver circuit is applicable to a display panel, wherein the display panel includes a plurality of rows of pixels; the gate driver circuit including at least one gate driver sub-circuit; wherein the gate driver sub-circuit includes: at least two shift register groups, wherein each shift register group includes a plurality of shift register units; at least two first dummy units, wherein the at least two first dummy units are respectively coupled to a same input enable terminal and the at least two shift register groups; and at least two second dummy units, wherein the at least two second dummy units are coupled to the at least two shift register groups.

Abstract: A display substrate, including: a plurality of partition control signal lines disposed on a base substrate; and a plurality of sub-pixels disposed on the base substrate, at least one of the sub-pixels includes a pixel circuit and a light emitting device. The pixel circuit includes a switch transistor, a first partition control transistor, a drive transistor and a first initialization transistor. The first partition control transistor is electrically connected to the switch transistor, the first initialization transistor, the drive transistor and at least one partition control signal line. The first partition control transistor is configured to: in response to a partition control signal on the partition control signal line, selectively transmit a received first initialization signal to a gate electrode of the drive transistor in an initialization phase, and selectively transmit a received data signal to the gate electrode of the drive transistor in a data writing phase.

Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.

Abstract: A display panel and a display device are provided, the first signal line extends from the display region to the electrostatic discharge region in a first direction, and provides a first display signal to the sub-pixels; the electrostatic discharge units are arranged in the first direction, each electrostatic discharge unit includes a sub electrostatic discharge unit, each sub electrostatic discharge unit includes an electrostatic discharge circuit and a first conductor, the electrostatic discharge circuit is connected to the first signal line and the first conductor, and charges on the first signal line move towards the first conductor; the electrostatic discharge units include two adjacent electrostatic discharge units in a second direction perpendicular to the first direction, orthographic projections of the two adjacent electrostatic discharge units on a plane parallel to the first direction are not overlapped, and on a plane parallel to the second direction are overlapped.

Abstract: Provided is a gate driver circuit. The gate driver circuit is applicable to a display panel, wherein the display panel includes a plurality of rows of pixels; the gate driver circuit including at least one gate driver sub-circuit; wherein the gate driver sub-circuit includes: at least two shift register groups, wherein each shift register group includes a plurality of shift register units; at least two first dummy units, wherein the at least two first dummy units are respectively coupled to a same input enable terminal and the at least two shift register groups; and at least two second dummy units, wherein the at least two second dummy units are coupled to the at least two shift register groups.

Abstract: Disclosed are a display substrate and a display apparatus, the display substrate includes a transparent region and a pixel region, the pixel region includes a plurality of light emitting devices, the plurality of light emitting devices include a first light emitting device, an orthographic projection of a first anode layer of the first light emitting device on a plane of the display substrate is partially overlapped with an orthographic projection of the transparent region on the plane of the display substrate, and an orthographic projection of a second anode layer of the first light emitting device on the plane of the display substrate is within a range of an orthographic projection of the pixel region on the plane of the display substrate.

Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.

Abstract: A pixel circuit includes: a driving sub-circuit, a sensing sub-circuit, a light-emitting control sub-circuit, a sensing control sub-circuit, a light-emitting device and a sensing terminal. The driving sub-circuit includes a first terminal and a second terminal coupled to the light-emitting device, and is configured to write a data signal into the driving sub-circuit in response to a first scan signal and control an electrical signal flowing through the driving sub-circuit according to the data signal. The sensing sub-circuit is configured to connect the second terminal to the sensing terminal in response to a second scan signal. The light-emitting control sub-circuit is configured to connect a first voltage terminal to the first terminal in response to a light-emitting control signal. The sensing control sub-circuit is configured to connect a second voltage terminal to the first terminal in response to a sensing control signal provided by a sensing control terminal.

Abstract: A profiled display panel, including a display area. The display area includes a plurality of display sub-areas; a plurality of cascade signal lines for coupling adjacent two of the gate driving sub-circuits. At least one cascade signal line includes a first cascade trace extending in a first direction and a second cascade trace extending in a second direction. The first cascade trace includes a plurality of first conductive patterns arranged on a first conductive layer and second conductive pattern arranged on a second conductive layer. The plurality of first conductive patterns are electrically connected to the second conductive pattern; and the second cascade trace includes a third conductive pattern arranged on the first conductive layer.

Abstract: A display panel includes pixel driving circuits distributed in an array and forming pixel driving circuit groups, each pixel driving circuit group includes pixel driving circuit rows with each including pixel driving circuits, each of which includes a driving circuit connected to a first, second and third nodes, to input a driving current to the third node through the second node in response to a signal of the first node; a first switching unit with a first end connected to a first power supply terminal and second end connected to the second node, to connect the first power supply terminal and the second node in response to a pulse width modulation signal; in a same pixel driving circuit group, a second end of any first switching unit is connected to a second end of at least one first switching unit in each of the other pixel driving circuit rows.

Abstract: A display substrate and a manufacturing method therefor, and a display device. The display substrate includes: a base substrate including a special-shaped display area and a frame area located on one side of the special-shaped display area; and the special-shaped display area includes a first display area and a second display area on located on one side of the first display area, and the second display area is arranged in contact with the frame area; a group of data lines located on the base substrate and located in the first display area and the second display area; a group of fan-out lines located on a side of a layer where the group of data lines are located away from the base substrate, located in the first display area, and electrically connected to the data lines; and a group of dummy leads.

Abstract: A display substrate and a display apparatus are provided, and the display substrate includes: a base substrate including a display area and a bonding area located at a side of the display area, the display area includes a first circuit signal line and a second circuit signal line, and the bonding area includes a bonding signal pin; a circuit structure layer located in the display area. The circuit structure layer includes at least one first circuit region and at least one second circuit region; the first circuit region includes at least one first gate drive circuit; the second circuit region includes at least one second gate drive circuit; the first gate drive circuit includes multiple cascaded first gate drive units, and the second gate drive circuit includes multiple cascaded second gate drive units; the multiple the first gate drive units are sequentially arranged along a second direction.

Abstract: A display substrate, including: a plurality of partition control signal lines disposed on a base substrate; and a plurality of sub-pixels disposed on the base substrate, at least one of the sub-pixels includes a pixel circuit and a light emitting device. The pixel circuit includes a switch transistor, a first partition control transistor, a drive transistor and a first initialization transistor. The first partition control transistor is electrically connected to the switch transistor, the first initialization transistor, the drive transistor and at least one partition control signal line. The first partition control transistor is configured to: in response to a partition control signal on the partition control signal line, selectively transmit a received first initialization signal to a gate electrode of the drive transistor in an initialization phase, and selectively transmit a received data signal to the gate electrode of the drive transistor in a data writing phase.

Abstract: Disclosed is a media information post recommendation method, including: calculating the recommendation index of a media information post according to the degree of matching between the industry to which a customer product belongs and a channel, as well as the target population covered by each media information post; and recommending a media information post to users according to the calculated recommendation index. Accordingly disclosed is a media information post recommendation system. The embodiments of the present disclosure do not rely on human experience to recommend media information posts, so it is possible to achieve systematic media information post recommendation and improve the recommendation efficiency of the media information posts as well as the releasing effect of media information.