Patents by Inventor Liu Wuping

Liu Wuping has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7276797
    Abstract: A structure and method for an improved a bond pad structure. A top wiring layer and a top dielectric (IMD) layer over a semiconductor structure are provided. The buffer dielectric layer is formed over the top wiring layer and the top dielectric (IMD) layer. A buffer opening is formed in the buffer dielectric layer exposing at least of portion of the top wiring layer. A barrier layer is formed over the buffer dielectric layer, and the top wiring layer in the buffer opening. A conductive buffer layer is formed over the barrier layer. The conductive buffer layer is planarized to form a buffer pad in the buffer opening. A passivation layer is formed over the buffer pad and the buffer dielectric layer. A bond pad opening is formed in the passivation layer over at least a portion of the buffer pad. A bond pad support layer is formed over the buffer pad and the buffer dielectric layer. A bond pad layer is formed over the bond pad support layer.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: October 2, 2007
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Zhang Fan, Zhang Bei Chao, Liu Wuping, Chok Kho Liep, Hsia Liang Choo, Lim Yeow Kheng, Alan Cuthbertson, Tan Juan Boon
  • Publication number: 20060071350
    Abstract: A structure and method for an improved a bond pad structure. We provide a top wiring layer and a top dielectric (IMD) layer over a semiconductor structure. The buffer dielectric layer is formed over the top wiring layer and the top dielectric (IMD) layer. We form a buffer opening in the buffer dielectric layer exposing at least of portion of the top wiring layer. We form a barrier layer over the buffer dielectric layer, and the top wiring layer in the buffer opening. A conductive buffer layer is formed over the barrier layer. We planarize the conductive buffer layer to form a buffer pad in the buffer opening. We form a passivation layer over the buffer pad and the buffer dielectric layer. We form a bond pad opening in the passivation layer over at least a portion of the buffer pad. We form a bond pad support layer over the buffer pad and the buffer dielectric layer. We form a bond pad layer over the a bond pad support layer.
    Type: Application
    Filed: November 21, 2005
    Publication date: April 6, 2006
    Inventors: Zhang Fan, Zhang Chao, Liu Wuping, Chok Liep, Hsia Choo, Lim Kheng, Alan Cuthbertson, Tan Boon
  • Patent number: 6998335
    Abstract: A structure and method for an improved a bond pad structure. We provide a top wiring layer and a top dielectric (IMD) layer over a semiconductor structure. The buffer dielectric layer is formed over the top wiring layer and the top dielectric (IMD) layer. We form a buffer opening in the buffer dielectric layer exposing at least of portion of the top wiring layer. We form a barrier layer over the buffer dielectric layer, and the top wiring layer in the buffer opening. A conductive buffer layer is formed over the barrier layer. We planarize the conductive buffer layer to form a buffer pad in the buffer opening. We form a passivation layer over the buffer pad and the buffer dielectric layer. We form a bond pad opening in the passivation layer over at least a portion of the buffer pad. We form a bond pad support layer over the buffer pad and the buffer dielectric layer. We form a bond pad layer over the a bond pad support layer.
    Type: Grant
    Filed: December 13, 2003
    Date of Patent: February 14, 2006
    Assignee: Chartered Semiconductor Manufacturing, LTD
    Inventors: Zhang Fan, Zhang Bei Chao, Liu Wuping, Chok Kho Liep, Hsia Liang Choo, Lim Yeow Kheng, Alan Cuthbertson, Tan Juan Boon
  • Publication number: 20050127530
    Abstract: A structure and method for an improved a bond pad structure. We provide a top wiring layer and a top dielectric (IMD) layer over a semiconductor structure. The buffer dielectric layer is formed over the top wiring layer and the top dielectric (IMD) layer. We form a buffer opening in the buffer dielectric layer exposing at least of portion of the top wiring layer. We form a barrier layer over the buffer dielectric layer, and the top wiring layer in the buffer opening. A conductive buffer layer is formed over the barrier layer. We planarize the conductive buffer layer to form a buffer pad in the buffer opening. We form a passivation layer over the buffer pad and the buffer dielectric layer. We form a bond pad opening in the passivation layer over at least a portion of the buffer pad. We form a bond pad support layer over the buffer pad and the buffer dielectric layer. We form a bond pad layer over the a bond pad support layer.
    Type: Application
    Filed: December 13, 2003
    Publication date: June 16, 2005
    Inventors: Zhang Fan, Zhang Chao, Liu Wuping, Chok Liep, Hsia Choo, Lim Kheng, Alan Cuthbertson, Tan Boom