Abstract: A mask, a stitching exposure method, a display panel, and a manufacturing method. The mask is used for manufacturing scan lines or data lines of a display panel by means of exposure; the mask plate is provided with a pattern area and a slit area located at the periphery of the pattern area; multiple exposure lines parallel to each other are provided in the pattern area; the multiple exposure lines are respectively continuous lines and used for manufacturing the scan lines or the data lines by means of exposure; the slit area is provided with a slit; the slit is used for disconnecting each scan line or data line at intermediate positions by means of exposure. The mask plate and the stitching exposure method can achieve disconnection of a scan line or a data line at intermediate positions in an exposure process.

Abstract: A mask, a stitching exposure method, a display panel, and a manufacturing method. The mask is used for manufacturing scan lines or data lines of a display panel by means of exposure; the mask plate is provided with a pattern area and a slit area located at the periphery of the pattern area; multiple exposure lines parallel to each other are provided in the pattern area; the multiple exposure lines are respectively continuous lines and used for manufacturing the scan lines or the data lines by means of exposure; the slit area is provided with a slit; the slit is used for disconnecting each scan line or data line at intermediate positions by means of exposure. The mask plate and the stitching exposure method can achieve disconnection of a scan line or a data line at intermediate positions in an exposure process.

Abstract: A thin film transistor array substrate comprises a transparent substrate, and scanning lines, data lines and pixel regions that are formed on the transparent substrate. Each pixel region comprises a pixel electrode, a thin film transistor for controlling the pixel electrode, a first push alignment electrode and a second push alignment electrode. Projections of the first and second push alignment electrodes on the transparent substrate are located on two opposite sides of the pixel electrode. The pixel electrode is covered with an insulation layer and the insulation layer is provided with a pull alignment opening. When the thin film transistor array substrate is in operation, an oblique pull electric field is formed at the pull alignment opening, and transverse push electric fields are formed between the first push alignment electrode and the pixel electrode as well as between the second push alignment electrode and the pixel electrode, respectively.

Abstract: A liquid crystal display panel includes a first and second substrates which are opposite, and further includes scanning lines, data lines, pixel electrodes and switches, intersection of two adjacent scanning lines and data lines forming a pixel region. The pixel electrodes are disposed in pixel regions. Each pixel electrode crosses one data line and includes a first and second sub-pixel electrodes which are electrically connected to each other; the first and second sub-pixel electrodes are arranged on two sides of the data line; there is a gap between the first and second sub-pixel electrodes, and the data line is configured in the gap. A problem that conventional liquid crystal display panel has a complex manufacture process, leaks light at a dark state and has a low penetrability can be solved, thereby improving yield of the products.

Abstract: A TFT array substrate includes a plurality of scanning lines, a plurality of data lines and a plurality of pixel regions. Each pixel region includes a pixel electrode, a first TFT, a pull alignment electrode, a second TFT, a first and second push alignment electrodes, so that when a voltage is applied to the TFT array substrate, a transverse pull electric field is formed between the pixel electrode and the pull alignment electrode, and transverse push electric fields are formed respectively between the first push alignment electrode and the pixel electrode and between the second push alignment electrode and the pixel electrode. Accordingly, liquid crystal molecules of the TFT array substrate can respond quickly and it is not necessary to configure bumps on a color filter substrate, thereby improving contrast ratio, simplifying manufacture process and reducing costs.

Abstract: A thin film transistor array substrate comprises a transparent substrate, and scanning lines, data lines and pixel regions that are formed on the transparent substrate. Each pixel region comprises a pixel electrode, a thin film transistor for controlling the pixel electrode, a first push alignment electrode and a second push alignment electrode. Projections of the first and second push alignment electrodes on the transparent substrate are located on two opposite sides of the pixel electrode. The pixel electrode is covered with an insulation layer and the insulation layer is provided with a pull alignment opening. When the thin film transistor array substrate is in operation, an oblique pull electric field is formed at the pull alignment opening, and transverse push electric fields are formed between the first push alignment electrode and the pixel electrode as well as between the second push alignment electrode and the pixel electrode, respectively.

Abstract: A liquid crystal display panel includes a first and second substrates which are opposite, and further includes scanning lines, data lines, pixel electrodes and switches, intersection of two adjacent scanning lines and data lines forming a pixel region. The pixel electrodes are disposed in pixel regions. Each pixel electrode crosses one data line and includes a first and second sub-pixel electrodes which are electrically connected to each other; the first and second sub-pixel electrodes are arranged on two sides of the data line; there is a gap between the first and second sub-pixel electrodes, and the data line is configured in the gap. A problem that conventional liquid crystal display panel has a complex manufacture process, leaks light at a dark state and has a low penetrability can be solved, thereby improving yield of the products.

Abstract: A TFT array substrate includes a plurality of scanning lines, a plurality of data lines and a plurality of pixel regions. Each pixel region includes a pixel electrode, a first TFT, a pull alignment electrode, a second TFT, a first and second push alignment electrodes, so that when a voltage is applied to the TFT array substrate, a transverse pull electric field is formed between the pixel electrode and the pull alignment electrode, and transverse push electric fields are formed respectively between the first push alignment electrode and the pixel electrode and between the second push alignment electrode and the pixel electrode. Accordingly, liquid crystal molecules of the TFT array substrate can respond quickly and it is not necessary to configure bumps on a color filter substrate, thereby improving contrast ratio, simplifying manufacture process and reducing costs.