Abstract: A display panel (20), a display device and a debugging method thereof are provided. The display panel (20) includes: a base substrate (1), including a display region (A) and a non-display region (B) surrounding the display region (A). the non-display region (B) including a binding region (C) located on one side of the display region (A); and a plurality of sub-pixels (2), located in the display region (A). Areas of pixel aperture regions of the plurality of sub-pixels (2) tend to increase in a direction from the binding region (C) to the display region (A).

Abstract: There is provided a voltage supply circuit, in which a signal output end of a power management integrated circuit, a signal input end of a transmission branch, and a signal input end of a voltage reduction branch are coupled to a first node; a signal output end of transmission branch and a signal output end of the voltage reduction branch are coupled to a second node; the power management integrated circuit supplies an initial voltage to the first node; the transmission branch is coupled to a control signal terminal, and switch between a conducting state and a cutoff state in response to control of a control signal, and write the initial voltage into the second node in the conducting state; and the voltage reduction branch performs voltage reduction on the initial voltage at the first node to obtain a reduced voltage to be written into the second node.

Abstract: A display device comprising a plurality of pixels arranged in multiple rows and multiple columns. The multiple pixel columns are connected with a plurality of source signal lines respectively. The pixels of odd-numbered rows in the same pixel column are connected with the source signal lines on a first side of the pixel column. The pixels of even-numbered rows in the same pixel column are connected with the source signal lines on a second side of the pixel column opposite the first side. A display control method comprising the steps of determining and storing target pixel potential data which comprises a target pixel potential for each of the plurality of source signal lines; and setting a potential of each source signal line as the target pixel potential corresponding to the source signal line in an interval zone between two adjacent frames.

Abstract: There is provided a voltage supply circuit, in which a signal output end of a power management integrated circuit, a signal input end of a transmission branch, and a signal input end of a voltage reduction branch are coupled to a first node; a signal output end of transmission branch and a signal output end of the voltage reduction branch are coupled to a second node; the power management integrated circuit supplies an initial voltage to the first node; the transmission branch is coupled to a control signal terminal, and switch between a conducting state and a cutoff state in response to control of a control signal, and write the initial voltage into the second node in the conducting state; and the voltage reduction branch performs voltage reduction on the initial voltage at the first node to obtain a reduced voltage to be written into the second node.

Abstract: A source driver includes at least one data input terminal, a plurality of data output terminals, at least two control terminals and a plurality of source driving circuits. Each source driving circuit is connected to a data input terminal of the at least one data input terminal, a data output terminal of the plurality of data output terminals and the at least two control terminals. The source driving circuit is configured such that: the source driving circuit converts a format of a data signal from the data input terminal; and in response to one of different control signals that is received by all the at least two control terminals, the source driving circuit has a corresponding different output impedance, and transmits the converted data signal to the data output terminal.

Abstract: A control method of a display apparatus is provided. The method includes: obtaining to-be-displayed data; starting to generate first image data of a first display panel based on the to-be-displayed data; sending image data to a second processing component based on the to-be-displayed data; and after generating the first image data, delaying sending the first image data to the first display panel based on a first difference between second duration taken by the second processing component to generate second image data and first duration taken by a first processing component to generate the first image data.

Abstract: The preset disclosure provides a display control method, a timing controller IC and a display device. The method includes: acquiring a preset grayscale voltage of a target pixel unit and a backlight brightness of a backlight region corresponding to the target pixel unit, in a current output display frame; outputting a first grayscale voltage to the target pixel unit if the backlight brightness of the corresponding backlight region is less than or equal to a first preset brightness value; outputting a second grayscale voltage to the target pixel unit if the backlight brightness of the corresponding backlight region is greater than the first preset brightness value; wherein the second grayscale voltage is greater than the first grayscale voltage, and both the second grayscale voltage and the first grayscale voltage are greater than the preset grayscale voltage.

Abstract: The present disclosure provides a method and an apparatus for compensating the display voltage, a display apparatus and a display device, the method comprises acquiring, when performing an inversion operation with a polarity inversion signal for an arbitrary pixel, a preceding grayscale value and a subsequent grayscale value of the pixel, wherein the polarity inversion signal is configured to control the polarity of the pixel voltage of the pixel, the preceding grayscale value is a grayscale value of the pixel in a preceding frame before the inversion operation, and the subsequent grayscale value is the grayscale value of the pixel in a subsequent frame after the inversion operation.

Abstract: A pixel driving circuit, a pixel driving method, an array substrate and a display device are provided. The pixel driving circuit includes a plurality of pixel regions; a pixel electrode array; and a thin film transistor switch, where at least one thin film transistor switch is arranged in each pixel region; the polarities of input voltage signals to two adjacent pixel electrodes are opposite in a same row of pixel electrodes; M rows of pixel electrodes are divided into Q pixel groups, including a first pixel group, a second pixel group and (Q?2) third pixel groups located between the first pixel group and the second pixel group, and each third pixel group includes at least q rows of pixel electrodes; and in the same column of pixel electrodes, the polarities of input voltage signals to the pixel electrodes in the same pixel group are the same, and the polarities of input voltage signals to the pixel electrodes of two adjacent pixel groups are opposite.

Abstract: Some embodiments of the present disclosure provide a shift register unit, a gate driver, a driving method thereof and a display device. The shift register unit includes: an output circuit, configured to receive a clock signal and output the clock signal to an output signal terminal under control of a voltage of a pull-up control node; a pull-down control circuit, configured to receive a control voltage signal and control the voltage of the pull-up control node and a voltage of the output signal terminal according to the control voltage signal; and an output control circuit, configured to receive a first voltage signal and the control voltage signal, and control the voltage of the output signal terminal in response to the first voltage signal and the control voltage signal.

Abstract: The disclosure discloses a method and apparatus for driving a display panel, and a display device. A method for driving a display panel according to an embodiment of this disclosure includes: determining a charging length of time of the current row of pixels; determining a common voltage value corresponding to the charging length of time; and driving the current row of pixels using the common voltage value.

Abstract: The present disclosure provides a mura compensation device, display panel, display device, and mura compensation method, which belongs to the field of panel technology. The mura compensation device includes a first flexible circuit board and a de-mura circuit, including a storage unit for storing mura compensation data, wherein the de-mura circuit is provided in the first flexible circuit board.

Abstract: The present disclosure provides a common voltage regulating circuit and a common voltage regulating method, a display driving circuit and a display device, the common voltage regulating circuit is applied to a display panel, and the display panel includes a pixel electrode and a common electrode, the common voltage regulating circuit includes: a first regulating sub-circuit configured to provide a signal from a second signal input terminal to a first signal output terminal under the control of an enabling signal terminal in a power-on stage of the display panel; the first signal input terminal is configured to input a signal to be provided to the common electrode in a display stage of the display panel, the second signal input terminal is configured to input a signal to be provided to the pixel electrode in the power-on stage, the first signal output terminal is coupled with the common electrode.

Abstract: A display driving method includes: determining, by a timing controller, an actual grayscale value of a sub-pixel image in an X-th row and a Y-th column according to a preset grayscale value of a sub-pixel image in an (X?1)-th row and the Y-th column and a preset grayscale value of the sub-pixel image in the X-th row and the Y-th column of an image frame to be displayed. The image frame to be displayed includes J rows and Q columns of sub-pixel images. X is greater than or equal to 2, and is less than or equal to J. Y is greater than or equal to 1, and is less than or equal to Q, and X, Y, J, and Q are all integers.

Abstract: The present disclosure is related to a driving circuit of a display panel. The driving circuit may include a turn-on voltage adjusting circuit. The turn-on voltage adjusting circuit may include a control subcircuit and a switching and voltage division subcircuit. The switching and voltage division subcircuit may include a switching subcircuit and a basic voltage division subcircuit. The switching subcircuit may be configured to perform voltage division of a signal outputted by the output terminal of the control subcircuit to form a voltage division feedback signal of the corresponding resolution under control of the control signal and output the voltage division feedback signal to the voltage division feedback node.

Abstract: The present disclosure provides a voltage compensation circuit and a voltage compensation method, a display driving circuit and a display device. The voltage compensation circuit includes: a voltage analyzing sub-circuit and a gamma voltage generating sub-circuit. The voltage analyzing sub-circuit is coupled to the display panel and configured to obtain pixel voltages of target pixels in the image to be detected; judge whether the display panel is abnormal according to the pixel voltages; generate a compensation control signal in response to that the display panel is abnormal. The gamma voltage generating sub-circuit is coupled to the voltage analyzing sub-circuit and is configured to compensate a gamma voltage corresponding to the image to be detected according to the compensation control signal so as to enable the pixel voltages of the target pixels to be consistent.

Abstract: A gray-scale drive table generating device is described that includes a sampling circuit configured to collect a first voltage between a drive electrode of a sub-pixel of a positive-frame and a common electrode and a second voltage between a drive electrode of a sub-pixel of a negative-frame and the common electrode in a display panel in each gray-scale; a processing circuit configured to generate a trigger signal when a voltage difference between the first voltage and the second voltage is greater than a voltage threshold; an adjustment circuit configured to adjust drive gray-scales of the sub-pixel of the positive-frame and/or the sub-pixel of the negative-frame in response to the trigger signal to make the voltage difference less than the voltage threshold; and a recording circuit configured to generate an adjusted gray-scale drive table according to the drive gray-scales of the sub-pixel of the positive-frame and the sub-pixel of the negative-frame in each gray-scale.

Abstract: A display driving device, a display driving method, a display module and a display device are provided. The display driving device includes: a PWM signal generating circuit configured to generate a PWM signal; a PWM signal acquisition circuit, configured to identify whether the PWM signal output by the PWM signal generating circuit is at a high level or a low level; a gamma voltage debugging circuit, configured to debug a gamma voltage to obtain a first group of gamma voltage reference data corresponding to the PWM signal at the high level and a second group of gamma voltage reference data corresponding to the PWM signal at the low level in each gray-scale image; and a gamma voltage switching circuit.

Abstract: A driving method of a display panel, a driving circuitry of a display panel and a display device are provided. The display panel includes Y gate lines, the Y gate lines are divided into a plurality of gate line groups based on a scanning sequence of the Y gate lines, and each gate line group includes at least one gate line; the driving method includes: determining an ith gate line to be scanned; adjusting an original charging duration of a scanning signal corresponding to the ith gate line to an adjustment charging duration, where the adjustment charging duration of every gate line in each gate line group are identical, and the adjustment charging durations of respective gate line groups gradually increase in a direction away from a source driver; and outputting the scanning signal corresponding to the ith gate line to the ith gate line, based on the adjustment charging duration of the ith gate line.

Abstract: The present disclosure provides a mura compensation device, display panel, display device, and mura compensation method, which belongs to the field of panel technology. The mura compensation device includes a first flexible circuit board and a de-mura circuit, including a storage unit for storing mura compensation data, wherein the de-mura circuit is provided in the first flexible circuit board.