Abstract: The present application provides a gate driving circuit, a driving method, and a display panel. The gate driving circuit includes a pull-up control module, a pull-up module, a pull-down control module, a pull-down module, and a voltage stabilizing module. The pull-down node and the pull-up control module are connected to the voltage stabilizing module, which is not only reduce a leakage current of the pull-down node in the high potential state to stabilize the high potential of the pull-down node, but also maintain the level of the pull-down node in the low potential state to stabilize the low potential of the pull-down node.

Abstract: A pixel compensation circuit, a display panel and a display device are disclosed according to an embodiment of the present disclosure. Through detecting the threshold voltage of the driving transistor and offsetting the threshold voltage of the driving transistor from the driving current of the light emitting unit, the driving current becomes unrelated to the threshold voltage of the driving transistor. This could solve the conventional issues of uneven display effect when the driving current of the light emitting unit is affected by the shift of the threshold voltage of the driving transistor.

Abstract: The present disclosure provides a pixel driving circuit, a display panel, and a display device. The pixel driving circuit includes a first reset transistor connected between a first reset voltage end and a gate electrode of a driving transistor, a first capacitor connected in series between the gate electrode of the driving transistor and one of a source electrode or a drain electrode of the driving transistor, and a second capacitor connected in series between the first capacitor and a second voltage end, thereby reducing an influence of a threshold voltage of the driving transistor on a driving current and ensuring light emission stability of light-emitting devices.

Abstract: A pixel arrangement structure provided by the present invention comprises a plurality of pixel groups. Each of the pixel groups comprises a first pixel, a second pixel, a third pixel, and a fourth pixel, wherein the first pixel includes a first sub-pixel and a second sub-pixel, and the second pixel includes the first sub-pixel and one second sub-pixel, two second sub-pixels in the first pixel and the second pixel share one same first sub-pixel, the third pixel and the fourth pixel both comprise a third sub-pixel and one second sub-pixel, two second sub-pixels in the third pixel and the fourth pixel share one same third sub-pixel, and the second sub-pixel is a blue sub-pixel. The invention increases the service lifespan of the blue sub-pixel.

Abstract: A gate driving unit includes an input module, a first output module, a second output module, a feedback module, and an output-controlling module. The input module outputs a previous level-transferring signal into a first node. The first output module outputs a present level-transferring signal. The second output module outputs a scan signal. The feedback module outputs a present-level feedback signal. The output-controlling module pulls up potential of the scan signal to a first direct-current high voltage and pulls up potential of the present level-transferring signal to a second direct-current high voltage.

Abstract: A gate driving unit includes an input module, a first output module, a second output module, a feedback module, and an output-controlling module. The input module outputs a previous level-transferring signal into a first node. The first output module outputs a present level-transferring signal. The second output module outputs a scan signal. The feedback module outputs a present-level feedback signal. The output-controlling module pulls up potential of the scan signal to a first direct-current high voltage and pulls up potential of the present level-transferring signal to a second direct-current high voltage.

Abstract: A gate driver on array (GOA) circuit layout is provided, including a plurality of driving thin-film transistor units, wherein each of the driving thin-film transistor units includes a wiring side and a capacitor side, and any two adjacent driving thin-film transistor units are spaced apart and connected in series with each other; and a plurality of first capacitor areas, wherein each of the first capacitor areas is disposed between two adjacent capacitor sides of the driving thin-film transistor units. The GOA circuit layout according to the present invention increases heat dissipation area for the driving thin-film transistors, which is more advantageous for heat dissipation. On the other hand, because of sufficient use of the first capacitor areas, a size of layout is basically not increased.

Abstract: A display panel and a manufacturing method thereof, the display panel includes a first sub-pixel strip, a second sub-pixel strip, and a third sub-pixel strip arranged in a row direction or a column direction. The sub-pixels on each sub-pixel strip of the present disclosure have the same color and are arranged in series. The first sub-pixels on the first sub-pixel strip and the second sub-pixels on the second sub-pixel strip are staggered to improve flatness of printing the luminous material and luminous uniformity of OLED devices.

Abstract: The disclosure provides a pixel mixed compensation circuit and a pixel mixed compensation method. The pixel mixed compensation circuit includes a plurality of pixel internal driving circuits arranged in an array and an external compensation circuit connecting with each of the internal driving circuits. A fourth TFT and a second capacitor are disposed between a source of a third TFT and a drain of a third TFT. The fourth TFT is turned on only during a detecting stage. The second capacitor is configured to feed back changes in electric potential of a second node to a sensing line. The external compensation circuits can detect changes in electric potential of the second node by the sensing line. The external compensation circuit can directly react to changes in current and can transmit a voltage value to a first node via data signals to adjust a voltage of the first node.

Abstract: A pixel driver circuit and a display panel are provided. The pixel driver circuit includes a control transistor, a first transistor, a fourth transistor, a light emitting device. A gate electrode of the control transistor receives first control signals, a source electrode of the control transistor receives data signals. A drain electrode of the control transistor is connected to a gate electrode of the first transistor and a gate electrode of the fourth transistor. A source electrode of the first transistor receives first power signals. A source electrode of the fourth transistor receives second power signals. Drain electrodes of the first transistor and fourth transistor are connected to an anode of the light emitting device. The first transistor and fourth transistor correspond to a first driving time period and a second driving time period alternated. The pixel driver circuit and display panel of the present invention enhance display effect.

Abstract: A thin film transistor (TFT) and a display panel are provided. In the TFT array substrate, a first TFT is correspondingly disposed in each pixel of a plurality of pixels. Each first TFT in an (N)th row of pixels of the pixels correspondingly has a gate electrically connected to an (N+1)th scan line of a plurality of scan lines, a drain electrically connected to an (N)th scan line of the scan lines, and a source receiving a negative supply voltage. Therefore, a scan signal received by each pixel is individually pulled down by each pixel, thereby significantly reducing a falling time of the scan signal, and facilitating ensuring display quality of the display panel.

Abstract: A display panel and a display terminal are provided. The display panel includes a base substrate and a plurality of sub-pixels. The sub-pixels include a sub-pixel driving circuit and a light emitting device. The sub-pixel driving circuit includes a detection unit, a first light emitting control unit, and a second light emitting control unit. By detecting a potential of a second node, the light emitting device does not emit light abnormally, there is no need to perform dark line processing on the sub-pixels in a current row, and influence of dark lines is eliminated.

Abstract: A display panel and a manufacturing method thereof, the display panel includes a first sub-pixel strip, a second sub-pixel strip, and a third sub-pixel strip arranged in a row direction or a column direction. The sub-pixels on each sub-pixel strip of the present disclosure have the same color and are arranged in series. The first sub-pixels on the first sub-pixel strip and the second sub-pixels on the second sub-pixel strip are staggered to improve flatness of printing the luminous material and luminous uniformity of OLED devices.

Abstract: A GOA unit, a GOA circuit and a display panel are provided. The GOA unit includes a pull-up module, a pull-up holding module, a converting module, a pull-down holding module, and a pull-down module. Each module can be implemented with N-type TFTs. The GOA unit could generate a negative impulse waveform for internal feedback mechanism.

Abstract: The present invention provides a method of driving a display panel and a driving device. The present invention determines sub-pixels shared by sub-pixel rendering technology through comparing differences of the color components, and the sub-pixels shared by the display image are not fixed. Since the sub-pixels with the smallest absolute value of the color component difference are selected for sharing, a contrast of an edge region of an image is improved, and distortion of an edge region of an image is reduced.

Abstract: A display panel and a display terminal are provided. The display panel includes a base substrate and a plurality of sub-pixels. The sub-pixels include a sub-pixel driving circuit and a light emitting device. The sub-pixel driving circuit includes a detection unit, a first light emitting control unit, and a second light emitting control unit. By detecting a potential of a second node, the light emitting device does not emit light abnormally, there is no need to perform dark line processing on the sub-pixels in a current row, and influence of dark lines is eliminated.

Abstract: The disclosure provides a pixel mixed compensation circuit and a pixel mixed compensation method. The pixel mixed compensation circuit includes a plurality of pixel internal driving circuits arranged in an array and an external compensation circuit connecting with each of the internal driving circuits. A fourth TFT and a second capacitor are disposed between a source of a third TFT and a drain of a third TFT. The fourth TFT is turned on only during a detecting stage. The second capacitor is configured to feed back changes in electric potential of a second node to a sensing line. The external compensation circuits can detect changes in electric potential of the second node by the sensing line. The external compensation circuit can directly react to changes in current and can transmit a voltage value to a first node via data signals to adjust a voltage of the first node.

Abstract: A thin film transistor (TFT) and a display panel are provided. In the TFT array substrate, a first TFT is correspondingly disposed in each pixel of a plurality of pixels. Each first TFT in an (N)th row of pixels of the pixels correspondingly has a gate electrically connected to an (N+1)th scan line of a plurality of scan lines, a drain electrically connected to an (N)th scan line of the scan lines, and a source receiving a negative supply voltage. Therefore, a scan signal received by each pixel is individually pulled down by each pixel, thereby significantly reducing a falling time of the scan signal, and facilitating ensuring display quality of the display panel.

Abstract: A gate driver on array (GOA) circuit layout is provided, including a plurality of driving thin-film transistor units, wherein each of the driving thin-film transistor units includes a wiring side and a capacitor side, and any two adjacent driving thin-film transistor units are spaced apart and connected in series with each other; and a plurality of first capacitor areas, wherein each of the first capacitor areas is disposed between two adjacent capacitor sides of the driving thin-film transistor units. The GOA circuit layout according to the present invention increases heat dissipation area for the driving thin-film transistors, which is more advantageous for heat dissipation. On the other hand, because of sufficient use of the first capacitor areas, a size of layout is basically not increased.

Abstract: A GOA unit, a GOA circuit and a display panel are provided. The GOA unit includes a pull-up module, a pull-up holding module, a converting module, a pull-down holding module, and a pull-down module. Each module can be implemented with N-type TFTs. The GOA unit could generate a negative impulse waveform for internal feedback mechanism.