Patents by Inventor Liviu Chiaburu
Liviu Chiaburu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8610456Abstract: A buffer amplifier has a power on state and a sleep state. During regular operation a coupling state of a load to an output node is detected using feedback voltage. In a sleep mode and in a power collapse mode a detection current is injected into the output node, to produce a voltage, and the coupling state of the load is detected from the voltage. Optionally, the detection current and detecting of the voltage on the output node is enables by a low duty cycle clock. Optionally, signals generated in detecting the coupling state are qualified through a debounce circuit.Type: GrantFiled: September 23, 2011Date of Patent: December 17, 2013Assignee: QUALCOMM IncorporatedInventors: Liviu Chiaburu, Shahin Mehdizad Taleie, Dongwon Seo, Roy B. Silverstein
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Publication number: 20130076436Abstract: A buffer amplifier has a power on state and a sleep state. During regular operation a coupling state of a load to an output node is detected using feedback voltage. In a sleep mode and in a power collapse mode a detection current is injected into the output node, to produce a voltage, and the coupling state of the load is detected from the voltage. Optionally, the detection current and detecting of the voltage on the output node is enables by a low duty cycle clock. Optionally, signals generated in detecting the coupling state are qualified through a debounce circuit.Type: ApplicationFiled: September 23, 2011Publication date: March 28, 2013Applicant: QUALCOMM IncorporatedInventors: Liviu Chiaburu, Shahin Mehdizad Taleie, Dongwon Seo, Roy Silverstein
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Patent number: 7948244Abstract: Embodiments of capacitive sensors (500, 600) and methods for reducing noise in capacitive sensors are provided. Embodiments of capacitive sensors include a gain stage (510, 610), a capacitive sensor output, and an active filtered-sampling stage (550, 650). The an active filtered-sampling stage includes a first resistive element (555, 655) coupled to the gain stage output, a second resistive element (565, 670) coupled to the capacitive sensor output, a node (560, 660) between the first and second resistive elements, and a switch (575, 675) selectively coupling the first node to an integrator circuit (550, 650), where the integrator circuit is coupled to the capacitive sensor output.Type: GrantFiled: July 22, 2009Date of Patent: May 24, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Dejan Mijuskovic, Liviu Chiaburu
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Patent number: 7855562Abstract: A sensor system (20) includes transducers (32, 34) each yielding an analog signal (37, 39) representing a parameter independently sensed by each of the transducers (32, 34). The signals (37, 39) are summed and the resulting transducer signal (46) is converted to a digital transducer signal (26) by a high resolution analog-to-digital converter (ADC) (48). Concurrently, one of the signals (37, 39) is subtracted from the other. The resulting difference signal (56) is converted to a digital difference signal (60) by a low resolution ADC (58). When the digital difference signal (60) is within a threshold window (78), a fault signal (28) indicates a normal condition (80) of the transducers (32, 34). When the signal (60) falls outside of the threshold window (78), a fault signal (28) indicates a fault condition (82) of the transducers. The transducer and fault signals (26, 28) are concurrently output from the sensor system (20).Type: GrantFiled: November 19, 2007Date of Patent: December 21, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Liviu Chiaburu, Marco Fuhrman, Thomas D. Ohe
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Publication number: 20090278551Abstract: Embodiments of capacitive sensors (500, 600) and methods for reducing noise in capacitive sensors are provided. Embodiments of capacitive sensors include a gain stage (510, 610), a capacitive sensor output, and an active filtered-sampling stage (550, 650). The an active filtered-sampling stage includes a first resistive element (555, 655) coupled to the gain stage output, a second resistive element (565, 670) coupled to the capacitive sensor output, a node (560, 660) between the first and second resistive elements, and a switch (575, 675) selectively coupling the first node to an integrator circuit (550, 650), where the integrator circuit is coupled to the capacitive sensor output.Type: ApplicationFiled: July 22, 2009Publication date: November 12, 2009Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Dejan Mijuskovic, Liviu Chiaburu
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Patent number: 7583088Abstract: An apparatus and method are provided for reducing noise in a capacitive sensor (200). One apparatus includes a gain stage (210) including an output, the gain stage configured to generate a first signal having a noise component and a second signal having a desired output component and the noise component, and a filtered-sampling stage (250) having an input coupled to the gain stage output, the filtered-sampling stage configured to sample the first signal, store the first signal, and subtract the first signal from the second signal to produce a desired output signal. A method includes generating a first signal having a first noise component of the gain stage (710), storing the first signal (725), generating a second signal comprising a desired output component and the first noise component (730), and subtracting the first signal from the second signal to produce a first output signal having the desired output component (750).Type: GrantFiled: January 26, 2007Date of Patent: September 1, 2009Assignee: Freescale Semiconductor, Inc.Inventors: Dejan Mijuskovic, Liviu Chiaburu
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Publication number: 20090128160Abstract: A sensor system (20) includes transducers (32, 34) each yielding an analog signal (37, 39) representing a parameter independently sensed by each of the transducers (32, 34). The signals (37, 39) are summed and the resulting transducer signal (46) is converted to a digital transducer signal (26) by a high resolution analog-to-digital converter (ADC) (48). Concurrently, one of the signals (37, 39) is subtracted from the other. The resulting difference signal (56) is converted to a digital difference signal (60) by a low resolution ADC (58). When the digital difference signal (60) is within a threshold window (78), a fault signal (28) indicates a normal condition (80) of the transducers (32, 34). When the signal (60) falls outside of the threshold window (78), a fault signal (28) indicates a fault condition (82) of the transducers. The transducer and fault signals (26, 28) are concurrently output from the sensor system (20).Type: ApplicationFiled: November 19, 2007Publication date: May 21, 2009Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Liviu Chiaburu, Marco Fuhrman, Tom D. Ohe
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Publication number: 20080180165Abstract: An apparatus and method are provided for reducing noise in a capacitive sensor (200). One apparatus includes a gain stage (210) including an output, the gain stage configured to generate a first signal having a noise component and a second signal having a desired output component and the noise component, and a filtered-sampling stage (250) having an input coupled to the gain stage output, the filtered-sampling stage configured to sample the first signal, store the first signal, and subtract the first signal from the second signal to produce a desired output signal. A method includes generating a first signal having a first noise component of the gain stage (710), storing the first signal (725), generating a second signal comprising a desired output component and the first noise component (730), and subtracting the first signal from the second signal to produce a first output signal having the desired output component (750).Type: ApplicationFiled: January 26, 2007Publication date: July 31, 2008Inventors: Dejan Mijuskovic, Liviu Chiaburu