Abstract: A method for optimizing computing power of a neural network module, a chip, an electronic device, and a medium are provided. The method includes: obtaining, by the chip, a computational graph of the neural network module having respective operators; performing at least one of adjustments below at least 1 time on a first operator in the computational graph according to specific operation of each operator: counterchanging a position of the first operator with a subsequent operator or a preceding operator in the computational graph, splitting the first operator into more than two identical operators, and inserting a plurality of first operators that are capable of canceling each other out; determining a second operator adjacent to the adjusted first operator in the computational graph according to the specific operations of each operator; and performing merge or cancellation, by the chip, on the adjusted first operator and the second operator.