Patents by Inventor Li-Yu Chen

Li-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11997778
    Abstract: A method includes following steps. A photoresist-coated substrate is received to an extreme ultraviolet (EUV) tool. An EUV radiation is directed from a radiation source onto the photoresist-coated substrate, wherein the EUV radiation is generated by an excitation laser hitting a plurality of target droplets ejected from a first droplet generator. The first droplet generator is replaced with a second droplet generator at a temperature not lower than about 150° C.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Yu Tu, Han-Lung Chang, Hsiao-Lun Chang, Li-Jui Chen, Po-Chung Cheng
  • Publication number: 20240165233
    Abstract: The present invention relates to a method for reducing localized fat deposits in a subject in need thereof in need thereof by topically treating the subject with rare-earth element doped calcium carbonate particles in combination with low-intensity ultrasound. The rare-earth element doped calcium carbonate particles have good biocompatibility and can increase reactive oxygen species (ROS) production and produce carbon dioxide (CO2) and calcium ions (Ca2+) in the region of administration under the ultrasonic irradiation. The method of the present invention is effective in inducing adipocyte necrosis, inhibiting adipogenesis, and decreasing body weight and useful for body sculpture.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 23, 2024
    Applicants: National Health Research Institutes, National United University, National Taiwan University
    Inventors: Feng-Huei LIN, Gin-Shin CHEN, Ping-Yu SHIH, Ching-Yun CHEN, Li-Ze LIN, Che-Yung KUAN, Zhi-Yu CHEN, I-Hsuan YANG
  • Patent number: 11987027
    Abstract: The present disclosure relates to an innovative leather and a manufacturing method thereof. The innovative leather includes a TPU substrate, a TPU adhering layer, and a TPU surface layer. The TPU adhering layer is disposed on the TPU substrate. The TPU surface layer is disposed on the TPU adhering layer. All materials of the innovative leather of the present disclosure are the same TPU materials, thus the innovative leather of the present disclosure can be recycled after the innovative leather of the present disclosure is used. The innovative leather of the present disclosure has recycling benefit.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: May 21, 2024
    Assignee: SAN FANG CHEMICAL INDUSTRY CO., LTD.
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Li-Yuan Chen, Yung-Yu Fu
  • Patent number: 11983475
    Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu, Lee-Chung Lu, Yen-Hung Lin, Li-Chun Tien, Yi-Kan Cheng
  • Publication number: 20240152321
    Abstract: A floating point pre-alignment structure for computing-in-memory applications includes a time domain exponent computing block and an input mantissa pre-align block. The time domain exponent computing block is configured to compute a plurality of original input exponents and a plurality of original weight exponents to generate a plurality of flags. Each of the flags is determined by adding one of the original input exponents and one of the original weight exponents. The input mantissa pre-align block is configured to receive a plurality of original input mantissas and shift the original input mantissas according to the flags to generate a plurality of weighted input mantissas, and sparsity of the weighted input mantissas is greater than sparsity of the original input mantissas. Each of the flags has a negative correlation with a sum of the one of the original input exponents and the one of the original weight exponents.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Meng-Fan CHANG, Ping-Chun WU, Jin-Sheng REN, Li-Yang HONG, Ho-Yu CHEN
  • Publication number: 20240142878
    Abstract: Example implementations described herein include a laser source and associated methods of operation that can balance or reduce uneven beam profile problem and even improve plasma heating efficiency to enhance conversion efficiency and intensity for extreme ultraviolet radiation generation. The laser source described herein generates an auxiliary laser beam to augment a pre-pulse laser beam and/or a main-pulse laser beam, such that uneven beam profiles may be corrected and/or compensated. This may improve an intensity of the laser source and also improve an energy distribution from the laser source to a droplet of a target material, effective to increase an overall operating efficiency of the laser source.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Inventors: Tai-Yu CHEN, Shang-Chieh CHIEN, Sheng-Kang YU, Li-Jui CHEN, Heng-Hsin LIU
  • Patent number: 11973275
    Abstract: An antenna for multi-broadband and multi-polarization communication, may include a plurality of radiators configured to jointly function as one or more dipoles, a first feed terminal for a first signal of a first polarization, and a second feed terminal for a second signal of a second polarization different from the first polarization. Each radiator may be configured to contribute to resonances at two or more nonoverlapping bands. In an embodiment, the antenna may further include a third feed terminal for a third signal of the first polarization, and a fourth feed terminal for a fourth signal of the second polarization.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: April 30, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chung-Hsin Chiang, Li-Yu Chen, Shih-Huang Yeh
  • Patent number: 11956994
    Abstract: The present disclosure is generally related to 3D imaging capable OLED displays. A light field display comprises an array of 3D light field pixels, each of which comprises an array of corrugated OLED pixels, a metasurface layer disposed adjacent to the array of 3D light field pixels, and a plurality of median layers disposed between the metasurface layer and the corrugated OLED pixels. Each of the corrugated OLED pixels comprises primary or non-primary color subpixels, and produces a different view of an image through the median layers to the metasurface to form a 3D image. The corrugated OLED pixels combined with a cavity effect reduce a divergence of emitted light to enable effective beam direction manipulation by the metasurface. The metasurface having a higher refractive index and a smaller filling factor enables the deflection and direction of the emitted light from the corrugated OLED pixels to be well controlled.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Chung-Chih Wu, Hoang Yan Lin, Guo-Dong Su, Zih-Rou Cyue, Li-Yu Yu, Wei-Kai Lee, Guan-Yu Chen, Chung-Chia Chen, Wan-Yu Lin, Gang Yu, Byung-Sung Kwak, Robert Jan Visser, Chi-Jui Chang
  • Patent number: 11953839
    Abstract: In a method of cleaning a lithography system, during idle mode, a stream of air is directed, through a first opening, into a chamber of a wafer table of an EUV lithography system. One or more particles is extracted by the directed stream of air from surfaces of one or more wafer chucks in the chamber of the wafer table. The stream of air and the extracted one or more particle are drawn, through a second opening, out of the chamber of the wafer table.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yu Tu, Shao-Hua Wang, Yen-Hao Liu, Chueh-Chi Kuo, Li-Jui Chen, Heng-Hsin Liu
  • Patent number: 11953063
    Abstract: A normally closed disc clamp system includes a housing with a rotating disc, a brake ring and a pressure-enhancing ring arranged therein. When only a first chamber is supplied with fluid, the fluid pushes the brake ring to release the rotating disc. When only a second chamber is fed with fluid, the fluid pushes the brake ring to keep the rotating disc in the braking state, and pushes the pressure-enhancing ring to compress an elastic unit. The energy generated by the compression of the elastic unit acts on the brake ring through the fluid, so that the brake ring achieves a double pressurization effect. If the action of the fluid fails, the brake ring can still provide a braking effect to the rotating disc through the elastic unit to improve operational safety. Further, the present invention further provides a rotating table using the normally closed disc clamp system.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 9, 2024
    Assignee: HIWIN TECHNOLOGIES CORP.
    Inventors: Peng-Wen Chen, Chien-Yu Lin, Li-Wen Huang
  • Publication number: 20240111456
    Abstract: A method of a storage device controller includes: using an interface circuit for receiving and storing different write address information of different write command signals sent from a host device, the different write address information being out of sequence; and, using multiple processor cores to rearrange the different write address information in sequence and then write data into at least one storage zone according to the different write address information rearranged in sequence.
    Type: Application
    Filed: October 2, 2022
    Publication date: April 4, 2024
    Applicant: Silicon Motion, Inc.
    Inventors: Li-Chi Chen, Yen-Yu Jou
  • Patent number: 11945156
    Abstract: A three-dimensional printing apparatus includes a liquid tank capable of accommodating a photosensitive liquid. The liquid tank includes a film, a plurality of side walls, a plate and a motor. The film has a workpiece curing area. The plurality of side walls surrounds the film. The plate is capable of supporting the film and having at least one fluid tunnel extending from a first surface of the plate contacting the film to a second surface of the plate. The motor is connected to the liquid tank to incline the liquid tank. A gap is formed between the plat and one of the plurality of side walls of the liquid tank, and the film is communicated with an outside space via the gap.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: April 2, 2024
    Assignee: YOUNG OPTICS INC.
    Inventors: Li-Han Wu, Chien-Hsing Tsai, Chao-Shun Chen, Tsung-Yu Liu
  • Publication number: 20240103378
    Abstract: The present disclosure provides an extreme ultraviolet (EUV) lithography system including a radiation source and an EUV control system integrated with the radiation source. The EUV control system includes a 3-dimensional diagnostic module (3DDM) designed to collect a laser beam profile of a laser beam from the radiation source in a 3-dimensional (3D) mode, an analysis module designed to analyze the laser beam profile, a database designed to store the laser beam profile, and an EUV control module designed to adjust the radiation source. The analysis module is coupled with the database and the EUV control module. The database is coupled with the 3DDM and the analysis module. The EUV control module is coupled with the analysis module and the radiation source.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Inventors: Tai-Yu CHEN, Tzu-Jung PAN, Kuan-Hung CHEN, Sheng-Kang YU, Shang-Chieh CHIEN, Li-Jui CHEN, Heng-Hsin LIU
  • Patent number: 11936927
    Abstract: A multimedia signal transmission control system is provided, which includes a transmitter control circuit and a receiver control circuit coupled with each other. The transmitter control circuit packs a control signal and at least one of multimedia signals into first hybrid data packets in an active video period of a video frame, and packs the control signal and another at least one of the multimedia signals into second hybrid data packets in a vertical front porch and a vertical back porch of the video frame. The receiver control circuit receives the first hybrid data packets in the active video period, and receives the second hybrid data packets in the vertical front porch and the vertical back porch. The receiver control circuit unpacks the first hybrid data packets and the second hybrid data packets to provide the control signal and the multimedia signals to a display module.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: March 19, 2024
    Assignee: Realtek Semiconductor Corporation
    Inventors: Yun-Hung Lin, Po-Hsien Wu, Li-Yu Chen
  • Publication number: 20240088030
    Abstract: Provided are semiconductor devices that include a first gate structure having a first end cap portion, a second gate structure having a second end cap portion coaxial with the first gate structure, a first dielectric region separating the first end cap portion and the second end cap portion, a first conductive element extending over the first gate structure, a second conductive element extending over the second gate structure, and a gate via electrically connecting the second gate structure and the second conductive element, with the first dielectric region having a first width and being positioned at least partially under the first conductive element and defines a spacing between the gate via and an end of the second end cap portion that exceeds a predetermined distance.
    Type: Application
    Filed: January 23, 2023
    Publication date: March 14, 2024
    Inventors: Chin-Liang CHEN, Chi-Yu LU, Ching-Wei TSAI, Chun-Yuan CHEN, Li-Chun TIEN
  • Publication number: 20240081056
    Abstract: A double patterning method of manufacturing select gates and word lines is provided in the present invention, including forming first string patterns composed of word line patterns and select gate patterns on a target layer, forming a conformal spacer layer on first string patterns, wherein the spacer layer forms trenches between first string patterns, forming a fill layer filling up the trenches on the spacer layer, removing fill layer outside of the trenches, so that fill layer in the trenches forms second string patterns, wherein the second string patterns and the first string patterns are spaced apart, removing exposed spacer layer, so that the first string patterns and the second string patterns constitute target patterns spaced apart from each other on the target layer, and performing an etching process using those target patterns as a mask to remove exposed target layer, so as to form word lines and select gates.
    Type: Application
    Filed: April 25, 2023
    Publication date: March 7, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Yi-Yeh Chuang, Zih-Song Wang, Li-Ta Chen, Shun-Yu Gao
  • Publication number: 20240072021
    Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.
    Type: Application
    Filed: October 26, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang, Po-Hao Tsai, Ming-Shih Yeh, Ta-Wei Liu
  • Publication number: 20240071849
    Abstract: A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Jian-You Chen, Kuan-Yu Huang, Li-Chung Kuo, Chen-Hsuan Tsai, Kung-Chen Yeh, Hsien-Ju Tsou, Ying-Ching Shih, Szu-Wei Lu
  • Publication number: 20240014572
    Abstract: A multiband antenna array is provided. The multiband antenna array includes a first multi-band antenna unit, a first high band antenna member, and a first low band antenna member. The first multi-band antenna unit includes a first high band antenna element and a first low band antenna element. A first distance is formed between the center of the first multi-band antenna unit and the center of the first high band antenna member. The first distance is 0.3˜0.8 times the wavelength of a high band signal. A second distance is formed between the center of the first multi-band antenna unit and the center of the first low band antenna member. The second distance is 0.3˜0.8 times the wavelength of a low band signal.
    Type: Application
    Filed: June 8, 2023
    Publication date: January 11, 2024
    Inventors: Li-Yu CHEN, Yeh-Chun KAO, Chih-Wei LEE
  • Publication number: 20230169931
    Abstract: A display includes a system on chip (SoC), a plurality of driver integrated circuits (ICs), and a plurality of groups of light-emitting diodes (LEDs). The SoC is arranged to generate a plurality of backlight control signals according to an input image data. The plurality of driver ICs are coupled to the SoC, and arranged to receive the plurality of backlight control signals, respectively, to generate a plurality of driving signals. The plurality of groups of LEDs are coupled to the plurality of driver ICs, respectively, wherein the plurality of driving signals are arranged to control brightness of the plurality of groups of LEDs, respectively.
    Type: Application
    Filed: October 11, 2022
    Publication date: June 1, 2023
    Applicant: Realtek Semiconductor Corp.
    Inventors: Shi-Xuan Hong, Li-Yu Chen, Po-Hsien Wu