Patents by Inventor Liz Cuevas

Liz Cuevas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming a self-aligned stack gate structure for use in a non-volatile memory array
    Patent number: 9570581
    Abstract: A stack gate structure for a non-volatile memory array has a semiconductor substrate having a plurality of substantially parallel spaced apart active regions, with each active region having an axis in a first direction. A first insulating material is between each stack gate structure in the second direction perpendicular to the first direction. Each stack gate structure has a second insulating material over the active region, a charge holding gate over the second insulating material, a third insulating material over the charge holding gate, and a first portion of a control gate over the third insulating material. A second portion of the control gate is over the first portion of the control gate and over the first insulating material adjacent thereto and extending in the second direction. A fourth insulating material is over the second portion of the control gate.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: February 14, 2017
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Willem-Jan Toren, Xian Liu, Gerhard Metzger-Brueckl, Nhan Do, Stephan Wege, Nadia Miridi, Chieng-Sheng Su, Cecile Bernardi, Liz Cuevas, Florence Guyot, Yueh-Hsin Chen, Henry Om'mani, Mandana Tadayoni
  • Method of Forming A Self-Aligned Stack Gate Structure For Use In A Non-volatile Memory Array
    Publication number: 20160225878
    Abstract: A stack gate structure for a non-volatile memory array has a semiconductor substrate having a plurality of substantially parallel spaced apart active regions, with each active region having an axis in a first direction. A first insulating material is between each stack gate structure in the second direction perpendicular to the first direction. Each stack gate structure has a second insulating material over the active region, a charge holding gate over the second insulating material, a third insulating material over the charge holding gate, and a first portion of a control gate over the third insulating material. A second portion of the control gate is over the first portion of the control gate and over the first insulating material adjacent thereto and extending in the second direction. A fourth insulating material is over the second portion of the control gate.
    Type: Application
    Filed: April 5, 2016
    Publication date: August 4, 2016
    Inventors: Willem-Jan Toren, Xian Liu, Gerhard Metzger-Brueckl, Nhan Do, Stephan Wege, Nadia Miridi, Chieng-Sheng Su, Cecile Bernardi, Liz Cuevas, Florence Guyot, Yueh-Hsin Chen, Henry Om'mani, Mandana Tadayoni
  • Self-aligned stack gate structure for use in a non-volatile memory array and a method of forming such structure
    Patent number: 9330922
    Abstract: A stack gate structure for a non-volatile memory array has a semiconductor substrate having a plurality of substantially parallel spaced apart active regions, with each active region having an axis in a first direction. A first insulating material is between each stack gate structure in the second direction perpendicular to the first direction. Each stack gate structure has a second insulating material over the active region, a charge holding gate over the second insulating material, a third insulating material over the charge holding gate, and a first portion of a control gate over the third insulating material. A second portion of the control gate is over the first portion of the control gate and over the first insulating material adjacent thereto and extending in the second direction. A fourth insulating material is over the second portion of the control gate.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: May 3, 2016
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Willem-Jan Toren, Xian Liu, Gerhard Metzger-Brueckl, Nhan Do, Stephan Wege, Nadia Miridi, Chien-Sheng Su, Cecile Bernardi, Liz Cuevas, Florence Guyot, Yueh-Hsin Chen, Henry Om'mani, Mandana Tadayoni
  • Self-Aligned Stack Gate Structure For Use In A Non-volatile Memory Array And A Method Of Forming Such Structure
    Publication number: 20130234223
    Abstract: A stack gate structure for a non-volatile memory array has a semiconductor substrate having a plurality of substantially parallel spaced apart active regions, with each active region having an axis in a first direction. A first insulating material is between each stack gate structure in the second direction perpendicular to the first direction. Each stack gate structure has a second insulating material over the active region, a charge holding gate over the second insulating material, a third insulating material over the charge holding gate, and a first portion of a control gate over the third insulating material. A second portion of the control gate is over the first portion of the control gate and over the first insulating material adjacent thereto and extending in the second direction. A fourth insulating material is over the second portion of the control gate.
    Type: Application
    Filed: March 7, 2012
    Publication date: September 12, 2013
    Inventors: Willem-Jan Toren, Xian Liu, Gerhard Metzger-Brueckl, Nhan Do, Stephan Wege, Nadia Miridi, Chien-Sheng Su, Cecile Bernardi, Liz Cuevas, Florence Guyot, Yueh-Hsin Chen, Henry Om'mani, Mandana Tadayoni