Patents by Inventor Lizhi Zhong
Lizhi Zhong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11902059Abstract: A receiver circuit including mechanisms for analog channel equalization and channel adaptation is disclosed. The receiver includes a front-end circuit configured to generate a filtered signal by performing filtering of an incoming signal that includes a stream of data symbols. A sample recovery circuit configured to sample an equalized signal, based on the filtered signal, to generate a plurality of recovered data symbols. A decision feedback equalization (DFE) circuit configured to generate the feedback signal based on the plurality of recovered data symbols. A logic circuit is configured to cause adjustment to one or more filters in the front-end circuit based on the plurality of recovered data symbols.Type: GrantFiled: May 27, 2022Date of Patent: February 13, 2024Assignee: Apple Inc.Inventors: Lizhi Zhong, Vishal Varma, Yu Chen, Wenyi Jin
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Publication number: 20230388162Abstract: A receiver circuit including mechanisms for analog channel equalization and channel adaptation is disclosed. The receiver includes a front-end circuit configured to generate a filtered signal by performing filtering of an incoming signal that includes a stream of data symbols. A sample recovery circuit configured to sample an equalized signal, based on the filtered signal, to generate a plurality of recovered data symbols. A decision feedback equalization (DFE) circuit configured to generate the feedback signal based on the plurality of recovered data symbols. A logic circuit is configured to cause adjustment to one or more filters in the front-end circuit based on the plurality of recovered data symbols.Type: ApplicationFiled: May 27, 2022Publication date: November 30, 2023Inventors: Lizhi Zhong, Vishal Varma, Yu Chen, Wenyi Jin
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Patent number: 11664809Abstract: An apparatus includes a receiver buffer, a phase compensation circuit, a data sampler circuit, and an error sampler circuit. The receiver buffer may generate an equalized signal on a signal node using an input signal received via a channel. The phase compensation circuit may, in response to an initiation of a training mode, replace the equalized signal on the signal node with a reference signal. The data sampler circuit may sample, using a data clock signal, the reference signal to generate a plurality of data samples. The error sampler circuit may sample, using an error clock signal, the reference signal to generate a plurality of errors samples. The phase compensation circuit may also adjust a phase difference between the data clock signal and the error clock signal using at least some of the plurality of data samples and at least some of the plurality of error samples.Type: GrantFiled: April 5, 2021Date of Patent: May 30, 2023Assignee: Apple Inc.Inventors: Jaeduk Han, Wenbo Liu, Wing Liu, Ming-Shuan Chen, Sanjeev K. Maheshwari, Vishal Varma, Sunil Bhosekar, Lizhi Zhong, Gary A. Rogan
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Publication number: 20210226639Abstract: An apparatus includes a receiver buffer, a phase compensation circuit, a data sampler circuit, and an error sampler circuit. The receiver buffer may generate an equalized signal on a signal node using an input signal received via a channel. The phase compensation circuit may, in response to an initiation of a training mode, replace the equalized signal on the signal node with a reference signal. The data sampler circuit may sample, using a data clock signal, the reference signal to generate a plurality of data samples. The error sampler circuit may sample, using an error clock signal, the reference signal to generate a plurality of errors samples. The phase compensation circuit may also adjust a phase difference between the data clock signal and the error clock signal using at least some of the plurality of data samples and at least some of the plurality of error samples.Type: ApplicationFiled: April 5, 2021Publication date: July 22, 2021Inventors: Jaeduk Han, Wenbo Liu, Wing Liu, Ming-Shuan Chen, Sanjeev K. Maheshwari, Vishal Varma, Sunil Bhosekar, Lizhi Zhong, Gary A. Rogan
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Patent number: 10972107Abstract: An apparatus includes a receiver buffer, a phase compensation circuit, a data sampler circuit, and an error sampler circuit. The receiver buffer may generate an equalized signal on a signal node using an input signal received via a channel. The phase compensation circuit may, in response to an initiation of a training mode, replace the equalized signal on the signal node with a reference signal. The data sampler circuit may sample, using a data clock signal, the reference signal to generate a plurality of data samples. The error sampler circuit may sample, using an error clock signal, the reference signal to generate a plurality of errors samples. The phase compensation circuit may also adjust a phase difference between the data clock signal and the error clock signal using at least some of the plurality of data samples and at least some of the plurality of error samples.Type: GrantFiled: July 31, 2019Date of Patent: April 6, 2021Assignee: Apple Inc.Inventors: Jaeduk Han, Wenbo Liu, Wing Liu, Ming-Shuan Chen, Sanjeev K. Maheshwari, Vishal Varma, Sunil Bhosekar, Lizhi Zhong, Gary A. Rogan
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Publication number: 20210036707Abstract: An apparatus includes a receiver buffer, a phase compensation circuit, a data sampler circuit, and an error sampler circuit. The receiver buffer may generate an equalized signal on a signal node using an input signal received via a channel. The phase compensation circuit may, in response to an initiation of a training mode, replace the equalized signal on the signal node with a reference signal. The data sampler circuit may sample, using a data clock signal, the reference signal to generate a plurality of data samples. The error sampler circuit may sample, using an error clock signal, the reference signal to generate a plurality of errors samples. The phase compensation circuit may also adjust a phase difference between the data clock signal and the error clock signal using at least some of the plurality of data samples and at least some of the plurality of error samples.Type: ApplicationFiled: July 31, 2019Publication date: February 4, 2021Inventors: Jaeduk Han, Wenbo Liu, Wing Liu, Ming-Shuan Chen, Sanjeev K. Maheshwari, Vishal Varma, Sunil Bhosekar, Lizhi Zhong, Gary A. Rogan
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Patent number: 10721105Abstract: A method and apparatus for adapting, in parallel, two operating parameters associated with an equalizer circuit is disclosed. A control circuit may be configured to initialize a first operating parameter to an initial value, and modify a second operating parameter based upon the initial value of the first parameter. In response to determining a peak amplitude of an output signal of the equalizer circuit is less than a threshold value, the control circuit may be further configured to select a new value for the first operating parameter and adapt, in response to the change in the first operating parameter, the second operating parameter based on a performance metric of the equalizer circuit.Type: GrantFiled: January 7, 2019Date of Patent: July 21, 2020Assignee: Apple Inc.Inventor: Lizhi Zhong
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Publication number: 20190140869Abstract: A method and apparatus for adapting, in parallel, two operating parameters associated with an equalizer circuit is disclosed. A control circuit may be configured to initialize a first operating parameter to an initial value, and modify a second operating parameter based upon the initial value of the first parameter. In response to determining a peak amplitude of an output signal of the equalizer circuit is less than a threshold value, the control circuit may be further configured to select a new value for the first operating parameter and adapt, in response to the change in the first operating parameter, the second operating parameter based on a performance metric of the equalizer circuit.Type: ApplicationFiled: January 7, 2019Publication date: May 9, 2019Inventor: Lizhi Zhong
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Patent number: 10177945Abstract: A method and apparatus for adapting, in parallel, two operating parameters associated with an equalizer circuit is disclosed. A control circuit may be configured to initialize a first operating parameter to an initial value, and modify a second operating parameter based upon the initial value of the first parameter. In response to determining a peak amplitude of an output signal of the equalizer circuit is less than a threshold value, the control circuit may be further configured to select a new value for the first operating parameter and adapt, in response to the change in the first operating parameter, the second operating parameter based on a performance metric of the equalizer circuit.Type: GrantFiled: July 26, 2017Date of Patent: January 8, 2019Assignee: Apple Inc.Inventor: Lizhi Zhong
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Patent number: 9787509Abstract: An apparatus including a receiver coupled to receive an input signal from a communication link and operable to employ decision feedback equalization to the input signal of the communication link and generate an edge sample signal. The apparatus also includes a timing recovery module coupled to the receiver and operable to receive the edge sample signal and use the edge sample signal to generate a data sampling phase signal, wherein the edge sample signal influences a settling point of the data sampling phase signal.Type: GrantFiled: January 5, 2016Date of Patent: October 10, 2017Assignee: Nvidia CorporationInventors: Lizhi Zhong, Vishnu Balan, Arif Al Amin, Sanjeev Maheshwari
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Patent number: 9762381Abstract: A method comprises receiving an input signal at an input of a receiver and retrieving a data sample signal and an error sample signal from the input signal. The method also comprises applying an adaptive procedure to generate a feedback code using the data sample signal and the error sample signal for feeding back into a decision feedback equalization (DFE) module. Further, it comprises converting the feedback code into a corresponding voltage value and assigning the corresponding voltage value as a tap weight for the DFE module. Finally, it comprises generating an edge sample signal by applying DFE to the input signal using the DFE module, wherein the DFE is based on the tap weight.Type: GrantFiled: July 3, 2013Date of Patent: September 12, 2017Assignee: NVIDIA CORPORATIONInventors: Lizhi Zhong, Vishnu Balan, Gautam Bhatia
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Publication number: 20160226684Abstract: An apparatus including a receiver coupled to receive an input signal from a communication link and operable to employ decision feedback equalization to the input signal of the communication link and generate an edge sample signal. The apparatus also includes a timing recovery module coupled to the receiver and operable to receive the edge sample signal and use the edge sample signal to generate a data sampling phase signal, wherein the edge sample signal influences a settling point of the data sampling phase signal.Type: ApplicationFiled: January 5, 2016Publication date: August 4, 2016Inventors: Lizhi Zhong, Vishnu Balan, Arif Al Amin, Sanjeev Maheshwari
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Patent number: 9246452Abstract: An apparatus having a circuit is disclosed. The circuit may be configured to (i) receive an input signal from a communication channel and (ii) generate an intermediate signal by amplifying the input signal (a) by a low-frequency gain in response to an amplitude control signal and (b) by a high-frequency gain in response to a boost control signal.Type: GrantFiled: February 28, 2013Date of Patent: January 26, 2016Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Lizhi Zhong, Freeman Y. Zhong, Hiroshi Kimura, Eric W. Zhang
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Patent number: 9231802Abstract: An apparatus including a receiver coupled to receive an input signal from a communication link and operable to employ decision feedback equalization to the input signal of the communication link and generate an edge sample signal. The apparatus also includes a timing recovery module coupled to the receiver and operable to receive the edge sample signal and use the edge sample signal to generate a data sampling phase signal, wherein the edge sample signal influences a settling point of the data sampling phase signal.Type: GrantFiled: December 26, 2012Date of Patent: January 5, 2016Assignee: NVIDIA CORPORATIONInventors: Lizhi Zhong, Vishnu Balan, Arif Al Amin, Sanjeev Maheshwari
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Patent number: 9166774Abstract: An apparatus including a bang-bang clock data recovery module and a decision feedback equalizer. A phase detector of the bang-bang clock and data recovery module may be configured to eliminate coupling between the bang-bang clock and data recovery module and the decision feedback equalizer based upon an error signal of the decision feedback equalizer and a predetermined coefficient.Type: GrantFiled: December 21, 2010Date of Patent: October 20, 2015Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventor: Lizhi Zhong
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Patent number: 8964827Abstract: An apparatus includes an error sample generating circuit and an adaptation circuit. The error sample generating circuit is generally configured to generate error samples at a plurality of phases. The adaptation circuit may be configured to adjust one or more equalizer settings based upon a data sample and the error samples.Type: GrantFiled: March 11, 2013Date of Patent: February 24, 2015Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventor: Lizhi Zhong
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Publication number: 20150010047Abstract: A method comprises receiving an input signal at an input of a receiver and retrieving a data sample signal and an error sample signal from the input signal. The method also comprises applying an adaptive procedure to generate a feedback code using the data sample signal and the error sample signal for feeding back into a decision feedback equalization (DFE) module. Further, it comprises converting the feedback code into a corresponding voltage value and assigning the corresponding voltage value as a tap weight for the DFE module. Finally, it comprises generating an edge sample signal by applying DFE to the input signal using the DFE module, wherein the DFE is based on the tap weight.Type: ApplicationFiled: July 3, 2013Publication date: January 8, 2015Inventors: Lizhi ZHONG, Vishnu BALAN, Gautam BHATIA
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Patent number: 8891607Abstract: An apparatus including a receiver having a feed forward equalizer (FFE) coupled to a communication channel. The receiver may be configured to adjust the FFE using information based on an estimate of one or more characteristics of the communication channel.Type: GrantFiled: September 6, 2012Date of Patent: November 18, 2014Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventor: Lizhi Zhong
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Publication number: 20140314138Abstract: A method comprises adapting a first tap weight of an equalizer, wherein a second tap weight of the equalizer is based at least in part on the first tap weight. Adapting the first tap weight further comprises computing a gradient from a data signal, an error signal and a channel pulse response sample. Adapting the first tap weight also comprises filtering the gradient with a loop filter and sending information to a transmitter via a back channel. Adapting the first tap weight further comprises configuring the first tap weight based on the information.Type: ApplicationFiled: April 22, 2013Publication date: October 23, 2014Applicant: NVIDIA CORPORATIONInventors: Lizhi ZHONG, Vishnu BALAN, Ratnakar DADI, Gautam BHATIA
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Patent number: 8867604Abstract: An apparatus comprising an inter symbol interference (ISI) cancellation circuit and a detector circuit. The inter symbol interference (ISI) cancellation circuit may be configured to minimize ISI at data sampling and crossing sampling points in a symbol interval of an input signal. The detector circuit may be configured to generate data samples and crossing samples at the data sampling and crossing sampling points in the symbol interval of the input signal.Type: GrantFiled: November 8, 2013Date of Patent: October 21, 2014Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventor: Lizhi Zhong