Abstract: The present invention relates to an improved retail process and apparatuses for putting customized marking devices, commonly called rubber stamps, in the hands of a customer in a convenient period of time such as five minutes after data entry. Prior art processes make stamps in a batch mode, generally forming text on a separate rubber sheet, cutting the sheet, and adhering individual rubber stamps to stamp mounts taken from inventory. The instant process forms text and/or graphics on stamp mounts that are complete except for the marking data on the rubber and an index card. A special purpose one-stamp-at-a-time laser engraver can be used with the process. As an alternative, a multiple cavity fixture can be used in conjunction with existing laser engravers. A further alternative uses a photopolymer method of producing single stamps.

Abstract: In a photodetector amplifier scheme, the invention compensates for variations in photodetector quiescent current by sampling the amplifier output and subtracting a controllable current from the input to the amplifier. When a chopper or other modulator is used on the optical signal, the samples are taken periodically during the chopping cycle. This sampled signal is processed by a combination of gain and low pass filtering. The result of this processing controls a current source which subtracts a significant fraction of the average quiescent current from the total detector current. In a typical application, the amplifier is of the resettable current integrator type. In this case, the invention makes it possible to use smaller integration capacitors resulting in larger signals than if the quiescent current were not reduced by the operation of the invention. The gain, frequency response, and range of compensated quiescent currents and can be altered by changing timing signals.

Abstract: An integrated circuit chip having a plurality of parallel channels, and a stack of such chips, are disclosed, in which the function of A/D signal conversion is accomplished in each on-chip channel. In order to satisfy the power and real estate limitations of the chip(s), a substantial part of the A/D conversion circuitry is located off-chip. Two devices are required in each channel on each chip, a precision comparator, and a storage register. These may be combined with an off-chip analog ramp, and an off-chip digital ramp. Certain on-chip performance enhancements are disclosed, which can operate either in the analog mode or the digital mode. One such enhancement is compensating for the voltage offset of each comparator. Another enhancement is reducing the duty cycle of each precision comparator, in order to lower power requirements. An important use for the disclosed concepts is the field of multi-layer Z-technology modules, having two dimensional photo-detector arrays.

Abstract: Circuitry for a focal plane pre-amplifier is disclosed in which the input of the pre-amplifier is switched between the signal from its photo-detector and a connection to ground. During the ground-connected interval, the pre-amplifier transistor is temporarily diode-connected in such a way that the transistor's voltage is stored on a capacitor, which is connected between the incoming photo-detector signal and the input of the pre-amplifier transistor. During the photo-detector connected interval, the voltage stored on the capacitor is subtracted from the voltage signal supplied by the photo-detector.

Abstract: A stabilized current source for integrated circuit use utilizes a linear ramp voltage across a capacitor to provide the desired current value in a "control" transistor which is in a current mirror relationship with a bias-current-providing transistor. The control and bias-providing transistors are "matched", in the sense that the ratio of the current value in one to the current value in the other remains the same at all times, provided they are subject to the same voltage. The linear ramp voltage across the capacitor causes a constant current to flow through the capacitor and the control transistor. The voltages across the control and bias-providing transistors are retained at the same value. Leakage at one voltage reference terminal of the bias-providing transistor is periodically compensated for by closing a switch between it and the corresponding reference terminal of the control transistor. Thus, the constant current in the control transistor is replicated in the matched bias-providing transistor.

Abstract: A pre-amplifier located "at the focal plane" of a detector array is disclosed which uses MOSFET transistors operated in the "weak inversion" region to provide operational amplifier performance. The dimensions of certain of the transistors are designed to minimize noise amplification. Feedback resistance for the operational amplifier is provided by switched capacitance using MOSFET transistors as switches, thereby permitting adjustment of the amplifier gain. Implanted and non-implanted MOSFET transistors are used in the differential amplifier in such a way as to avoid the need for a biasing network.