Patents by Inventor Llewelyn S. Dunwell

Llewelyn S. Dunwell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Segment descriptor present bit recycle and detect logic for a memory management unit
    Patent number: 4827400
    Abstract: A data processing system includes a logical address to a physical address translator in an extended memory management unit. A 128 word memory stores task segment descriptor words which include a base address. A 16 word memory stores corresponding present bits to indicate if the addressed task segment descriptor is present in its memory. This arrangement allows a 128 word memory to be cleared in 16 memory cycles.
    Type: Grant
    Filed: April 7, 1986
    Date of Patent: May 2, 1989
    Assignee: Honeywell Bull Inc.
    Inventors: Llewelyn S. Dunwell, Richard P. Brown, Arthur Peters, John L. Curley
  • Hardware demand fetch cycle system interface
    Patent number: 4727486
    Abstract: A data processing system includes a central processor unit (CPU), a main memory and a memory management unit (MMU). Information is stored in main memory in segments, each segment being identified by a segment descriptor stored in a translation table in the MMU. Logical addresses from the CPU address segment descriptors in the MMU's translation table. These segment descriptors include the physical address of the location in main memory of the first word of the segment. If the segment descriptor is not in the translation table location, then the MMU operation is suspended while the segment descriptor is demand fetched from main memory.
    Type: Grant
    Filed: May 2, 1986
    Date of Patent: February 23, 1988
    Assignee: Honeywell Information Systems Inc.
    Inventors: Michael D. Smith, Llewelyn S. Dunwell, Richard A. Lemay, Robert C. Miller, Theodore R. Staplin, Jr., William E. Woods, John L. Curley