Abstract: A signal conditioning circuit for a light sensor, in particular for an ambient light sensor, comprises a first integration stage (INT1) connected to a first sensor input (IN1) to receive a first and second sensor signal and a second integration stage (INT2) comprising a coupling input (IN2) to receive from the first integration stage (INT1) a first and second integrated sensor signal. A coupling stage (S3, C5) is connecting the first and second integration stages (INT1, INT2) and is designed to generate a difference signal from consecutively received integrated first and second integrated sensor signals. A sensor arrangement and a method for signal conditioning for a light sensor is also presented.

Abstract: A light sensor arrangement according to the proposed principle comprises at least one first unshielded well (D0) and at least one second shielded well (D1) in a substrate (P). The at least one first unshielded well (D0) is being exposed to incident light (?) and configured to generate a first sensor signal (Ch0) as a function of the incident light (?). The at least one second shielded well (D1) in the substrate (p) being shielded from the incident light (?) and configured to generate a second sensor signal (Ch1) as a function of the incident light (?). The light sensor arrangement further comprises means for temperature compensation providing the first and second sensor signals (Ch0, Ch1) as temperature compensated sensor signals as a function of substrate temperature. Means to determine spectral content of the incident light (?) are provided to determine the spectral content as a function of the temperature compensated first and second sensor signals (Ch0, Ch1).

Abstract: A single shared processing path is used as contexts are switched during processing. Each unique context is processed using a corresponding unique pipeline. If a pipeline that is executing under one context stalls, processing is switched in the shared processing path to another pipeline that is executing under second context. New pipelines are enabled for execution by borrowing a clock cycle from the currently executing pipeline. In some cases contexts are assigned various relative priority levels. In one case a context switching microprocessor is used in a communication engine portion of a system-on-a-chip communication system.

Abstract: Data processing system (800) and process (100) produce a hierarchical interconnection description of an integrated circuit design from a plurality of functional modules and a desired hierarchy. After an integrated circuit description is received (102), an interconnection structure is created (104) for each hierarchical level and functional module within the integrated circuit description. Based upon the desired hierarchy, a hierarchical tree is generated. Based upon the hierarchical tree, the interconnection structures are filled (106) with relevant interconnection and pin information to define interconnections among functional modules and hierarchical levels. After each interconnection structure is filled, a complete hierarchical interconnection description of the integrated circuit design has been completed. Finally, the hierarchical interconnection description is output (108).