Patents by Inventor Lloyd K. Frick

Lloyd K. Frick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10776233
    Abstract: In general, a test instrument includes a first processing system that is programmable to run one or more test programs to test a device interfaced to a test instrument, and that is programmed to control operation of the test instrument, and a second processing system that is dedicated to device testing. The second processing system being programmable to run one or more test programs to test the device, and the first processing system has a first application programming interface (API) and the second processing system has a second API, the first API and the second API being different APIs, the first API and the second API having at least some duplicate functions.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: September 15, 2020
    Assignee: Teradyne, Inc.
    Inventors: Lloyd K. Frick, David John Lind
  • Patent number: 10387356
    Abstract: An example method is performed on a packet-oriented bus at a point between a source of a data packet and a destination of a data packet. The example method includes detecting a format of the data packet on the packet-oriented bus; determining a time at which the data packet was detected; generating a timestamp report containing the time, with the timestamp report being addressed to a device connected to the packet-oriented bus; and outputting the timestamp report to the device. Detecting, determining, generating, and outputting are performed by digital logic connected to the packet-oriented bus.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: August 20, 2019
    Assignee: Teradyne, Inc.
    Inventor: Lloyd K. Frick
  • Patent number: 9759772
    Abstract: In general, a test instrument includes a first processing system that is programmable to run one or more test programs to test a device interfaced to the test instrument, and that is programmed to control operation of the test instrument, a second processing system that is dedicated to device testing, the second processing system being programmable to run one or more test programs to test the device, and programmable logic configured to act as an interface between the test instrument and the device, the programmable logic being configurable to perform one or more tests on the device. The first processing system and the second processing system are programmable to access the device via the programmable logic.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: September 12, 2017
    Assignee: Teradyne, Inc.
    Inventors: David Kaushansky, Lloyd K. Frick, Stephen J. Bourassa, David Vandervalk, Michael Thomas Fluet, Michael Francis McGoldrick
  • Patent number: 8914566
    Abstract: A process for managing interrupts, which may be performed using electronic circuitry, includes: receiving interrupts bound for a processing device, where the interrupts are received from hardware devices that are configured to communicate with the processing device; generating data containing information corresponding to the interrupts; and sending the data to the processing device.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: December 16, 2014
    Assignee: Teradyne, Inc.
    Inventors: David Vandervalk, Lloyd K. Frick
  • Patent number: 8745337
    Abstract: A memory address filter is configurable to emulate memory overrun performance of a legacy memory using an electronic memory of equal or greater capacity. The address filter includes a comparator configured to determine whether a target address is greater than a maximum legacy-address. Memory emulation at target address values greater than the maximum legacy-address value includes one or more of inhibiting the memory transaction; accomplishing the requested memory transaction at the maximum legacy-address value; and accomplishing the requested memory transaction at an address equivalent to the target address wrapped according to the maximum legacy-address value. In some embodiments, the address filter accepts one or more configuration parameters, such as memory depth, wrap-around, and overwrite enable.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: June 3, 2014
    Assignee: Teradyne, Inc.
    Inventors: Lloyd K. Frick, Eric Truebenbach
  • Patent number: 8701130
    Abstract: A first computing device is programmed to perform operations (i) to collect parameter data for use by a remote function, and (ii) to pass information, including the parameter data, to a second computing device. The second computing device is programmed to perform operations (i) to build a stack based on the parameter data, (ii) to use the information to locate code for the function on the second computing device, (iii) to execute the code for the function on the second computing device, where the function uses the parameter data on the stack, (iv) to obtain output values from execution of the code for the function, and (v) to pass parameter data, including the output values, to the first computing device.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: April 15, 2014
    Assignee: Teradyne, Inc.
    Inventor: Lloyd K. Frick
  • Publication number: 20130347010
    Abstract: A first computing device is programmed to perform operations (i) to collect parameter data for use by a remote function, and (ii) to pass information, including the parameter data, to a second computing device. The second computing device is programmed to perform operations (i) to build a stack based on the parameter data, (ii) to use the information to locate code for the function on the second computing device, (iii) to execute the code for the function on the second computing device, where the function uses the parameter data on the stack, (iv) to obtain output values from execution of the code for the function, and (v) to pass parameter data, including the output values, to the first computing device.
    Type: Application
    Filed: June 26, 2012
    Publication date: December 26, 2013
    Inventor: Lloyd K. Frick
  • Publication number: 20130339803
    Abstract: A process for managing interrupts, which may be performed using electronic circuitry, includes: receiving interrupts bound for a processing device, where the interrupts are received from hardware devices that are configured to communicate with the processing device; generating data containing information corresponding to the interrupts; and sending the data to the processing device.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 19, 2013
    Inventors: David Vandervalk, Lloyd K. Frick
  • Publication number: 20130110445
    Abstract: In general, a test instrument includes a first processing system that is programmable to run one or more test programs to test a device interfaced to the test instrument, and that is programmed to control operation of the test instrument, a second processing system that is dedicated to device testing, the second processing system being programmable to run one or more test programs to test the device, and programmable logic configured to act as an interface between the test instrument and the device, the programmable logic being configurable to perform one or more tests on the device. The first processing system and the second processing system are programmable to access the device via the programmable logic.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Applicant: TERADYNE, INC.
    Inventors: David Kaushansky, Lloyd K. Frick, Stephen J. Bourassa, David Vandervalk, Michael Thomas Fluet, Michael Francis McGoldrick
  • Publication number: 20130111505
    Abstract: In general, a test instrument includes a first processing system that is programmable to run one or more test programs to test a device interfaced to a test instrument, and that is programmed to control operation of the test instrument, and a second processing system that is dedicated to device testing. The second processing system being programmable to run one or more test programs to test the device, and the first processing system has a first application programming interface (API) and the second processing system has a second API, the first API and the second API being different APIs, the first API and the second API having at least some duplicate functions.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Applicant: Teradyne, Inc.
    Inventors: Lloyd K. Frick, David John Lind
  • Patent number: 8310270
    Abstract: An apparatus for use in testing a device includes a communication channel having a set of programmable parameters associated therewith. The programmable parameters result in a bias condition on the communication channel. A bias control circuit is used to affect the bias condition that results from the programmable parameters in order to emulate a desired bias condition.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: November 13, 2012
    Assignee: Teradyne, Inc.
    Inventors: Tushar K. Gohel, Lloyd K. Frick
  • Publication number: 20090172310
    Abstract: A memory address filter is configurable to emulate memory overrun performance of a legacy memory using an electronic memory of equal or greater capacity. The address filter includes a comparator configured to determine whether a target address is greater than a maximum legacy-address. Memory emulation at target address values greater than the maximum legacy-address value includes one or more of inhibiting the memory transaction; accomplishing the requested memory transaction at the maximum legacy-address value; and accomplishing the requested memory transaction at an address equivalent to the target address wrapped according to the maximum legacy-address value. In some embodiments, the address filter accepts one or more configuration parameters, such as memory depth, wrap-around, and overwrite enable.
    Type: Application
    Filed: December 19, 2008
    Publication date: July 2, 2009
    Inventors: Lloyd K. FRICK, Eric Truebenbach
  • Publication number: 20090091347
    Abstract: An apparatus for use in testing a device includes a communication channel having a set of programmable parameters associated therewith. The programmable parameters result in a bias condition on the communication channel. A bias control circuit is used to affect the bias condition that results from the programmable parameters in order to emulate a desired bias condition.
    Type: Application
    Filed: October 4, 2007
    Publication date: April 9, 2009
    Inventors: Tushar K. Gohel, Lloyd K. Frick