Patents by Inventor Lloyd W. Feaver

Lloyd W. Feaver has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5225376
    Abstract: According to the principles of this invention, a polysilicon layer in a semiconductor device is shaped so that in subsequent processing steps a uniform topology is achieved. In particular, a first layer, typically polysilicon, is overlain by a second layer, typically spin-on glass, which is in turn overlain by a mask layer. An opening is formed in the mask layer and the second layer. An isotropic etchant is applied to the structure after the opening is formed. The etchant is formulated to have a differential etch rate in the first and the second layers so that the first layer after etching has an edge surface with a taper of less than 60.degree. and preferably about 45.degree..
    Type: Grant
    Filed: January 13, 1992
    Date of Patent: July 6, 1993
    Assignee: NEC Electronics, Inc.
    Inventors: Lloyd W. Feaver, Masanori Sakata