Abstract: A Hardware Security Module (HSM) (900), and method thereof, suitable for use in securely servicing cryptographic requests from multiple tenant applications to preserve end-to-end privacy is provided. A Link Encryption and Key Diversification interoperability (43) between two processors provides cryptographic and logical isolation between multiple tenant applications on the HSM (900) that use and share more than one PCIe Physical Function (30) over more than one Virtual Function (VF) (21) to one or more Crypto Units (CU) (61) for satisfying a request (46) of an HSM cryptographic services. An Output Feedback (OFB) block with CRC support is further provided with encryption and decryption. The HSM as configured is more resistant to side channel attacks.

Abstract: Method for activating a feature of a chip having an interface comprising at least two power pins. The method comprises the following steps: the chip measures a series of voltage values between said power pins, the chip detects a series of sync signals different from clock signals, said sync signals being interleaved with said voltage values, the chip identifies a data sequence from said series of voltage values, and the chip activates the feature only if the data sequence matches a predefined pattern.

Abstract: Method for activating a feature of a chip having an interface comprising at least two power pins. The method comprises the following steps: the chip measures a series of voltage values between said power pins, the chip detects a series of sync signals different from clock signals, said sync signals being interleaved with said voltage values, the chip identifies a data sequence from said series of voltage values, and the chip activates the feature only if the data sequence matches a predefined pattern.

Abstract: A method and a system for protecting a static digital datum contained in a first element of an electronic circuit, intended to be exploited by a second element of this circuit, in which: on the side of the first element, the static datum is converted into a dynamic data flow by at least one first linear shift feedback register representing a different polynomial according to the value of the static datum; the dynamic flow is transmitted to the second element; and on the side of the second element, the received dynamic flow is decoded by at least one second shift register representing at least one of the polynomials that has been used by the first element.

Abstract: A method and a system for protecting a static digital datum contained in a first element of an electronic circuit, intended to be exploited by a second element of this circuit, in which: on the side of the first element, the static datum is converted into a dynamic data flow by at least one first linear shift feedback register representing a different polynomial according to the value of the static datum; the dynamic flow is transmitted to the second element; and on the side of the second element, the received dynamic flow is decoded by at least one second shift register representing at least one of the polynomials that has been used by the first element.