Abstract: Power management circuitry includes a power management circuitry having a handshake watchdog (HWD) timer and configured to, upon a reset, set the HWD timer to a maximum delay time allowed between an initial wakeup request received at a first input and a qualified wakeup request expected at a second input and configured to start the HWD timer counting in response to the initial wakeup request. Processing circuitry includes a wakeup signal aggregator configured to receive wakeup signals from internal and external wakeup events and to provide a notification of an occurrence of a wakeup event. The notification is provided as the initial wakeup request. A low power mode sequencer configured to initiate a low power mode exit sequence in response to the notification from the wakeup signal aggregator and to provide the qualified wakeup request as a result of performing at least a portion of the exit sequence.

Abstract: The present disclosure concerns an electron microscopy method, including the emission of a precessing electron beam and the acquisition, at least partly simultaneous, of an electron diffraction pattern and of intensity values of X rays.

Abstract: The present disclosure concerns an electron microscopy method, including the emission of a precessing electron beam and the acquisition, at least partly simultaneous, of an electron diffraction pattern and of intensity values of X rays.

Abstract: Technologies are described herein for refreshing data-linked diagrams on a server computer and viewing and consuming the refreshed diagrams via a Web browser. A drawing program allows equations within a diagram definition to define how external data is utilized to modify the attributes of a diagram element. When the diagram is published to a server computer, the definition is converted to server-legible definition. A published diagram is generated that includes a diagram representation defined by the server-legible definition. Upon a request for the published diagram, the external data is refreshed and the diagram definition is updated. The equations are recalculated to generate new element attributes. The diagram representation is then updated with the new attributes and returned for display by a client Web browser. An interface provides exploration tools and a client API exposes methods for surfacing external data and annotating the diagram.

Abstract: Technologies are described herein for refreshing data-linked diagrams on a server computer and viewing and consuming the refreshed diagrams via a Web browser. A drawing program allows equations within a diagram definition to define how external data is utilized to modify the attributes of a diagram element. When the diagram is published to a server computer, the definition is converted to server-legible definition. A published diagram is generated that includes a diagram representation defined by the server-legible definition. Upon a request for the published diagram, the external data is refreshed and the diagram definition is updated. The equations are recalculated to generate new element attributes. The diagram representation is then updated with the new attributes and returned for display by a client Web browser. An interface provides exploration tools and a client API exposes methods for surfacing external data and annotating the diagram.

Abstract: Embodiments of the present invention generate equations that model a synchronous circuit that contains sequential elements, which may include transparent elements, and a plurality of multiple-phase clocks. Phase-related information is assigned to nodes of the circuit. The phase-related information describes input and output characteristics at nodes of the circuit as the characteristics relate to clock phases. Equations are formed that model signals at the circuit nodes based on the phase-related information.

Abstract: Embodiments of the present invention generate equations that model a synchronous circuit that contains sequential elements, which may include transparent elements, and a plurality of multiple-phase clocks. Phase-related information is assigned to nodes of the circuit. The phase-related information describes input and output characteristics at nodes of the circuit as the characteristics relate to clock phases. Equations are formed that model signals at the circuit nodes based on the phase-related information.

Abstract: The invention relates to a process for fabricating a semiconductor optoelectronic device comprising an active region in strip form. The process comprises the stages consisting in 1) producing various layers (120, 130, 140, 150, 160) making up the complete structure of the optoelectronic device by a single epitaxy; 2) etching the structure obtained in stage 1) down to the base of the active layer (130) of the optoelectronic device to isolate a strip in the said active layer; 3) depositing an electrically isolating material of controlled index (170) on the etched zone. The invention also relates to the devices obtained.

Abstract: Process for the anisotropic etching of a III-V material and application to surface treatment for epitaxial growth.This process includes the step of etching a III-V material (2) by reactive ionic etching using a gaseous mixture containing by volume 20 to 30% of at least one gaseous hydrocarbon, 30 to 50% of at least one inert gas and 20 to 50% of hydrogen.Said etching can be performed locally with the aid of a Si.sub.3 N.sub.4 etching mask (4a).