Patents by Inventor Loic Sanchez

Loic Sanchez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260114320
    Abstract: A die to wafer direct hybrid bonding method includes providing at least one die comprising a first copper pad and a first silicon oxide layer, providing a wafer comprising a second copper pad and a second silicon oxide layer, and handling the die so as to position the face of the die facing the zone for receiving the die on the wafer, by aligning the first and second pads. At least one water drop is deposited in the zone for receiving the die and/or on the face of the die. Pressure on the die is applied to form, from the water drop, a water film between the face and the zone for receiving the die.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 23, 2026
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, SET CORPORATION
    Inventors: Frank FOURNEL, Loic SANCHEZ, Noura NADI, Nicolas RAYNAUD, Antoine SARCIAT, Tifenn KERBIRIOU, Clément CASTAN
  • Patent number: 12463174
    Abstract: A process for bonding chips to a substrate by direct bonding includes providing a support with which the chips are in contact, the chips in contact with the support being separate from one another. This bonding process also includes forming a liquid film on one face of the substrate, bringing the chips into contact with the liquid film, where the action of bringing the chips into contact with the liquid film causes attraction of the chips toward the substrate, and evaporating the liquid film in order to bond the chips to the substrate by direct bonding.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: November 4, 2025
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Frank Fournel, Loic Sanchez, Brigitte Montmayeul
  • Patent number: 11694991
    Abstract: A method for transferring at least one chip, from a first support to a second support, includes forming, while the chip is assembled to the first support, an interlayer in the liquid state between, and in contact with, a front face of the chip and an assembly surface of a face of the second support and a solidification of the interlayer. Then, the chip is detached from the first support while maintaining the interlayer in the solid state.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: July 4, 2023
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Frank Fournel, Emilie Bourjot, Séverine Cheramy, Sylvain Maitrejean, Loic Sanchez
  • Publication number: 20230029338
    Abstract: A process for bonding chips to a substrate by direct bonding includes providing a support with which the chips are in contact, the chips in contact with the support being separate from one another. This bonding process also includes forming a liquid film on one face of the substrate, bringing the chips into contact with the liquid film, where the action of bringing the chips into contact with the liquid film causes attraction of the chips toward the substrate, and evaporating the liquid film in order to bond the chips to the substrate by direct bonding.
    Type: Application
    Filed: December 17, 2020
    Publication date: January 26, 2023
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Frank FOURNEL, Loic SANCHEZ, Brigitte MONTMAYEUL
  • Publication number: 20210407961
    Abstract: A method for transferring at least one chip, from a first support to a second support, includes forming, while the chip is assembled to the first support, an interlayer in the liquid state between, and in contact with, a front face of the chip and an assembly surface of a face of the second support and a solidification of the interlayer. Then, the chip is detached from the first support while maintaining the interlayer in the solid state.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 30, 2021
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Frank FOURNEL, Emilie BOURJOT, Séverine CHERAMY, Sylvain MAITREJEAN, Loic SANCHEZ
  • Patent number: 10438921
    Abstract: A method for direct bonding an electronic chip onto a substrate or another electronic chip, the method including: carrying out a hydrophilic treatment of a portion of, a surface of the electronic chip and of a portion of a surface of the substrate or of the other electronic chip; depositing an aqueous fluid on the portion of the surface of the substrate or of the second electronic chip; depositing the portion of the surface of the electronic chip on the aqueous fluid; drying the aqueous fluid until the portion of the surface of the electronic chip is rigidly connected to the portion of the surface of the substrate or of the other electronic chip: and during at least part of the drying of the aqueous fluid, emitting ultrasound into the aqueous fluid through the substrate or the other electronic chip.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: October 8, 2019
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Frank Fournel, Xavier Baillin, Séverine Cheramy, Patrick Leduc, Loic Sanchez
  • Publication number: 20180218997
    Abstract: A method for direct bonding an electronic chip onto a substrate or another electronic chip, the method including: carrying out a hydrophilic treatment of a portion of, a surface of the electronic chip and of a portion of a surface of the substrate or of the other electronic chip; depositing an aqueous fluid on the portion of the surface of the substrate or of the second electronic chip; depositing the portion of the surface of the electronic chip on the aqueous fluid; drying the aqueous fluid until the portion of the surface of the electronic chip is rigidly connected to the portion of the surface of the substrate or of the other electronic chip: and during at least part of the drying of the aqueous fluid, emitting ultrasound into the aqueous fluid through the substrate or the other electronic chip.
    Type: Application
    Filed: July 26, 2016
    Publication date: August 2, 2018
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Frank FOURNEL, Xavier BAILLIN, Séverine CHERAMY, Patrick LEDUC, Loic SANCHEZ
  • Patent number: 9586207
    Abstract: A method for capillary self-assembly of a plate and a carrier, including: forming an etching mask on a region of a substrate; reactive-ion etching the substrate, the etching using a series of cycles each including isotropic etching followed by surface passivation, wherein a duration of the isotropic etching for each cycle increases from one cycle to another, a ratio between durations of the passivation and etching of each cycle is lower than a ratio for carrying out a vertical anisotropic etching to form a carrier having an upper surface defined by the region and side walls defining an acute angle with the upper surface; removing the etching mask; placing a droplet on the upper surface of the carrier; and placing the plate on the droplet.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: March 7, 2017
    Assignees: Commissariat à l'énergie atomique et aux énergies alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Sebastien Mermoz, Lea Di Cioccio, Thomas Magis, Loic Sanchez
  • Patent number: 9455174
    Abstract: A system is provided for individually supporting at least one component having opposing front and back faces, including a supporting device having a plurality of cells each delimited by a wall and having a contact zone to support the component, at least a part of the cells each receiving a component by its front face, the supporting and contact zones are configured so a surface of the front face is not in contact with the wall, the contact zone is located on a periphery of the front face and forms a closed zone around the front face, the supporting zone forms a closed zone on the wall, and the contact zone includes an edge surface set back in a thickness direction with respect to the front face, the thickness direction extending from the front to the back face perpendicular to at least one of the faces.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: September 27, 2016
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Loic Sanchez, Laurent Bally, Brigitte Montmayeul
  • Publication number: 20160144365
    Abstract: A method for capillary self-assembly of a plate and a carrier, including: forming an etching mask on a region of a substrate; reactive-ion etching the substrate, the etching using a series of cycles each including isotropic etching followed by surface passivation, wherein a duration of the isotropic etching for each cycle increases from one cycle to another, a ratio between durations of the passivation and etching of each cycle is lower than a ratio for carrying out a vertical anisotropic etching to form a carrier having an upper surface defined by the region and side walls defining an acute angle with the upper surface; removing the etching mask; placing a droplet on the upper surface of the carrier; and placing the plate on the droplet.
    Type: Application
    Filed: July 8, 2014
    Publication date: May 26, 2016
    Applicant: Commissariat A L'energie Atomique et Aux Energies Alternatives
    Inventors: Sebastien MERMOZ, Lea DI CIOCCIO, Thomas MAGIS, Loic SANCHEZ
  • Publication number: 20140044516
    Abstract: The invention relates to a system for individually supporting components (20), comprising at least one component (20) each comprising a front face (21) and a back face (22) opposite the front face (21), and a supporting device comprising a member (40) supporting said components (20), characterized in that the supporting member (40) is provided with cells (2) each one being delimited by a wall, with at least a part of the cells (41) each receiving a component (20) by the front face (21) thereof, with the cells (41) including a zone supporting a contact zone of the component (20), with the supporting zone and the contact zone being so configured that the surface of the front face (21) of the component (20) is not in contact with the wall of the cell (41).
    Type: Application
    Filed: July 1, 2013
    Publication date: February 13, 2014
    Inventors: Loic SANCHEZ, Laurent Bally, Brigitte Montmayeul
  • Patent number: 8003550
    Abstract: The invention relates to a method for detecting defects, more particularly emergent dislocations of an element having at least one crystalline germanium-base superficial layer. The method comprises an annealing step of the element in an atmosphere having a base that is a mixture of at least an oxidizing gas and a neutral gas enabling selective oxidizing of the emergent dislocations of the crystalline germanium-base superficial layer.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: August 23, 2011
    Assignee: Commissariat à l'Energie Atomique
    Inventors: Loic Sanchez, Chrystel Deguet
  • Patent number: 7776716
    Abstract: A method for fabricating semiconductor on insulator wafers by providing a semiconductor substrate or a substrate that includes an epitaxial semiconductor layer as a source substrate, attaching the source substrate to a handle substrate to form a source handle assembly and detaching the source substrate at a predetermined splitting area provided inside the source substrate and being essentially parallel to its main surface, to remove a layer from the source handle assembly to thereby create the semiconductor on insulator wafer. A diffusion barrier layer, in particular, an oxygen diffusion barrier layer can be provided on the source substrate. In addition the invention relates to the corresponding semiconductor on insulator wafers that are produced by the method.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: August 17, 2010
    Assignees: S.O.I.Tec Silicon on Insulator Technologies, Commissariat à l'Energie Atomique (CEA)
    Inventors: Chrystel Deguet, Takeshi Akatsu, Hubert Moriceau, Thomas Signamarcheix, Loic Sanchez
  • Publication number: 20100184303
    Abstract: The invention relates to a method for detecting defects, more particularly emergent dislocations of an element having at least one crystalline germanium-base superficial layer. The method comprises an annealing step of the element in an atmosphere having a base that is a mixture of at least an oxidizing gas and a neutral gas enabling selective oxidizing of the emergent dislocations of the crystalline germanium-base superficial layer.
    Type: Application
    Filed: December 18, 2009
    Publication date: July 22, 2010
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventors: Loic Sanchez, Chrystel Deguet
  • Publication number: 20070284660
    Abstract: A method for fabricating semiconductor on insulator wafers by providing a semiconductor substrate or a substrate that includes an epitaxial semiconductor layer as a source substrate, attaching the source substrate to a handle substrate to form a source handle assembly and detaching the source substrate at a predetermined splitting area provided inside the source substrate and being essentially parallel to its main surface, to remove a layer from the source handle assembly to thereby create the semiconductor on insulator wafer. A diffusion barrier layer, in particular, an oxygen diffusion barrier layer can be provided on the source substrate. In addition the invention relates to the corresponding semiconductor on insulator wafers that are produced by the method.
    Type: Application
    Filed: May 9, 2007
    Publication date: December 13, 2007
    Inventors: Chrystel Deguet, Takeshi Akatsu, Hubert Moriceau, Thomas Signamarcheix, Loic Sanchez