Patents by Inventor Long Bu

Long Bu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10270348
    Abstract: A synchronous switching regulator circuit for supply regulation of a switching circuit includes a pass transistor to couple the switching circuit to a supply voltage. The synchronous switching regulator circuit further includes a switch that is operable to synchronously turn off a flow of a supply current through the pass transistor. The switching circuit can be controlled by a switching signal, and the switch can operate in synchronization with the switching circuit.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: April 23, 2019
    Assignee: Avago Technologies International Sales PTE. Limited
    Inventors: Choong Yul Cha, Dandan Li, Hung-Ming Chien, Long Bu, Stephen C. Au
  • Publication number: 20180241312
    Abstract: A synchronous switching regulator circuit for supply regulation of a switching circuit includes a pass transistor to couple the switching circuit to a supply voltage. The synchronous switching regulator circuit further includes a switch that is operable to synchronously turn off a flow of a supply current through the pass transistor. The switching circuit can be controlled by a switching signal, and the switch can operate in synchronization with the switching circuit.
    Type: Application
    Filed: October 12, 2017
    Publication date: August 23, 2018
    Inventors: Choong Yul CHA, Dandan LI, Hung-Ming CHIEN, Long BU, Stephen C. AU
  • Publication number: 20180241404
    Abstract: A circuit for phase locked loop (PLL) multiple spur cancellation includes multiple spur cancellation circuits and a number of multiplexers that are coupled to respective input ports of the spur cancellation circuits. The circuit further includes a number of demultiplexers that are coupled to respective output ports of the spur cancellation circuits. Each spur cancellation circuit can cancel a spur associated with a spur source, and input nodes of the multiplexers and output nodes of the demultiplexers are coupled to different connection points of a PLL circuit.
    Type: Application
    Filed: October 20, 2017
    Publication date: August 23, 2018
    Inventors: Long BU, David Christopher Garrett, Dandan Li
  • Patent number: 10056912
    Abstract: A circuit for phase locked loop (PLL) multiple spur cancellation includes multiple spur cancellation circuits and a number of multiplexers that are coupled to respective input ports of the spur cancellation circuits. The circuit further includes a number of demultiplexers that are coupled to respective output ports of the spur cancellation circuits. Each spur cancellation circuit can cancel a spur associated with a spur source, and input nodes of the multiplexers and output nodes of the demultiplexers are coupled to different connection points of a PLL circuit.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: August 21, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Long Bu, David Christopher Garrett, Dandan Li
  • Patent number: 9595924
    Abstract: In one embodiment, a method comprising during a first calibration instance, converting at a first transconductance stage a first output voltage from a power amplifier of a transceiver to a first set of current signals; and during a second calibration instance not overlapping the first calibration instance, converting at a second transconductance stage a second output voltage from the power amplifier to a second set of current signals.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: March 14, 2017
    Assignee: Broadcom Corporation
    Inventors: Stephen Au, Vikram Magoon, Long Bu, Dandan Li, Weifeng Feng
  • Publication number: 20140036973
    Abstract: In one embodiment, a method comprising during a first calibration instance, converting at a first transconductance stage a first output voltage from a power amplifier of a transceiver to a first set of current signals; and during a second calibration instance not overlapping the first calibration instance, converting at a second transconductance stage a second output voltage from the power amplifier to a second set of current signals.
    Type: Application
    Filed: August 3, 2012
    Publication date: February 6, 2014
    Applicant: BROADCOM CORPORATION
    Inventors: Stephen Au, Vikram Magoon, Long Bu, Dandan Li, Weifeng Feng
  • Patent number: 8400224
    Abstract: A low noise amplifier includes a programmable input stage, having a first gain that is programmable based on a first control signal. A programmable cascode stage, has a second gain that is programmable based on a second control signal. A programmable resistor stage controls the quality of a resonant tank circuit, based on a third control signal.
    Type: Grant
    Filed: December 18, 2011
    Date of Patent: March 19, 2013
    Assignee: Broadcom Corporation
    Inventors: Stephen Au, Long Bu, Dandan Li