Abstract: The present application discloses a method for constructing a high-conductivity fracture of carbonate reservoir stimulation, and belongs to the field of oil and gas field stimulation. The method includes: S1. determining a lithology of a target layer; S2. preliminarily selecting a rock strengthening agent for in-situ modification of the fracture wall surfaces; S3. performing an experiment on in-situ modification of the fracture wall surfaces with the rock strengthening agent under a reservoir environment; S4. selecting the rock strengthening agent based on the experimental results; S5. constructing a mathematical model relating rock embedment strength to factors such as the rock strengthening agent; S6. constructing a mathematical model relating fracture conductivity to factors such as the rock embedment strength of the fracture wall surfaces; and S7. inversely designing parameters such as the rock strengthening agent based on the fracture conductivity required in the reservoir stimulation.

Abstract: The present application discloses a method for constructing a high-conductivity fracture of carbonate reservoir stimulation, and belongs to the field of oil and gas field stimulation. The method includes: S1. determining a lithology of a target layer, S2. preliminarily selecting a rock strengthening agent for in-situ modification of the fracture wall surfaces; S3. performing an experiment on in-situ modification of the fracture wall surfaces with the rock strengthening agent under a reservoir environment; S4. selecting the rock strengthening agent based on the experimental results; S5. constructing a mathematical model relating rock embedment strength to factors such as the rock strengthening agent; S6. constructing a mathematical model relating fracture conductivity to factors such as the rock embedment strength of the fracture wall surfaces; and S7. inversely designing parameters such as the rock strengthening agent based on the fracture conductivity required in the reservoir stimulation.

Abstract: A warp-knitted integrated plush fabric and preparation method thereof are provided. The plush fabric includes a first plush layer, a second plush layer, and a connecting layer; wherein the first plush layer includes a front guide bar underlap layer formed by processing the front guide bar underlaps; the connecting layer, from the first plush layer to the second plush layer, successively includes a middle guide bar underlap layer, a back guide bar underlap layer, a middle guide bar loop layer, and a front guide bar loop layer, each layer being formed by interknitting the corresponding middle guide bar underlaps, back guide bar underlaps, middle guide bar loops, and front guide bar loops successively; the second plush layer includes a back guide bar loop layer, a back guide bar underlap layer, or a combination of both. The preparation method includes the steps of yarn warping, on-machine knitting, and dyeing and finishing.

Abstract: An operation method of an electronic device is provided. A busy-waiting instruction indicating that the operating system of the processing device is in a busy-waiting state is received. The processing device is in a virtual machine mode. A microcode of the busy-waiting instruction is obtained according to the registered value of the first register. The waiting enabling instruction is generated, and the first counting value corresponding to the waiting enabling instruction and the second counting value corresponding to the first system time are obtained according to the microcode. The first and second counting values are added to generate a third counting value and store it in a second register. According to the waiting enabling instruction, a subsequent microcode is stopped sending to the processing device, so that the processing device enters an idle state, and the counter is enabled to start counting according to the third counting value.

Abstract: Embodiments of the present disclosure relate to a method for controlling a Vsync signal, an electronic device, a storage medium, and a chip. The method includes: A synthesis system receives a Vsync signal request message sent by a main thread of an application. After receiving the Vsync signal request message, the synthesis system determines a number of rendering times of a rendering thread of the application in unit time. When the number of rendering times of the rendering thread in unit time is equal to the system refresh rate of an electronic device, a Vsync thread sends a Vsync signal to the main thread of the application at a first frequency, and the first frequency is equal to the system refresh rate.

Abstract: This application provides a display control method and a related device, and relates to the field of terminal technologies. The display control method includes: starting a first application in response to a first operation of a user; and in response to a second operation performed by the user on the first application, obtaining touch point coordinates and a touch event of the second operation based on a touch sampling rate of an electronic device; generating a first vertical synchronization signal based on a screen refresh rate of the electronic device, and generating a second vertical synchronization signal based on the touch event; and performing drawing and rendering of an image frame to be refreshed and displayed in response to the first vertical synchronization signal or the second vertical synchronization signal when the second operation reaches a sliding response threshold of the first application.

Abstract: This application relates to the field of image processing technologies, and provides an image presentation method, an electronic device, a storage medium, and a chip. The method may include: After an upper-layer application completes drawing a buffer, SurfaceFlinger (SF) does not need to wait for a Vsync signal, but immediately composes the buffer drawn by the upper-layer application, and a display driver sends the composed buffer to a display for display after receiving the Vsync signal. To avoid accumulation of the composed buffer, the method may further include: After the upper-layer application completes drawing the buffer, when a composed buffer has not yet been displayed, the SF stops a current composition and disables the Vsync signal sent to the SF. In addition, the SF takes the latest buffers for composition and discards the older buffers when composing buffers.

Abstract: The present invention relates to a method for a processor and a computer system to enter system management mode (SMM). The method is applied to the processor, which includes at least one logical core. The method includes entering the SMM in response to a system management interrupt (SMI), storing current state information to a corresponding state save area; setting operation mode to target operating mode, and executing the SMI handler under the target operating mode. The address of the state save area, the address of the core configuration information memory space, and the address of the SMI handler can be determined directly. Each logical core may enter the target operating mode directly through hardware setting every time after entering the SMM, and thus does not need to perform a fixed operation of mode switching when executing the SMI handler, which may improve the execution efficiency of the SMI handler.

Abstract: Embodiments of the present disclosure relate to a method for controlling a Vsync signal, an electronic device, a storage medium, and a chip. The method includes: A synthesis system receives a Vsync signal request message sent by a main thread of an application. After receiving the Vsync signal request message, the synthesis system determines a number of rendering times of a rendering thread of the application in unit time. When the number of rendering times of the rendering thread in unit time is equal to the system refresh rate of an electronic device, a Vsync thread sends a Vsync signal to the main thread of the application at a first frequency, and the first frequency is equal to the system refresh rate.

Abstract: The present invention reveals an ultra-thin ultra-high strength steel wire, a wire rod for an ultra-thin ultra-high strength steel wire and its producing method. The chemical components of the wire rod comprise in percentage by mass: C 0.90˜0.96%, Si 0.12˜0.30%, Mn 0.30˜0.65%, Cr 0.10˜0.30%, Al?0.004%, Ti?0.001%, Cu?0.01%, Ni?0.01%, S?0.01%, P?0.01%, O?0.0006%, N?0.0006%, and the balance is Fe and unavoidable impurity elements. The wire rod for the ultra-thin ultra-high strength steel wire may be used as a base material for producing the ultra-thin ultra-high strength steel wire having a diameter in a range of 50˜60 ?m and a tensile strength larger than or equal to 4500 MPa.

Abstract: The present invention relates to a method for a processor and a computer system to enter system management mode (SMM). The method is applied to the processor, which includes at least one logical core. The method includes entering the SMM in response to a system management interrupt (SMI), storing current state information to a corresponding state save area; setting operation mode to target operating mode, and executing the SMI handler under the target operating mode. The address of the state save area, the address of the core configuration information memory space, and the address of the SMI handler can be determined directly. Each logical core may enter the target operating mode directly through hardware setting every time after entering the SMM, and thus does not need to perform a fixed operation of mode switching when executing the SMI handler, which may improve the execution efficiency of the SMI handler.

Abstract: The present application relates to the technical field of system management mode (SMM), and in particular it relates to a control method, a processor, and a computer system for system management mode. The method is applied to a processor. The processor includes at least one logical core. The method performs an initialization setting before each logical core enters system management mode. The initialization setting includes: allocating system management random access memory (SMRAM) required in the SMM to each logical core; and storing addresses related to the SMRAM of each logical core into at least one model-specific register MSR. There is no need to set SMRAM for each logical core serially. This shortens the time spent on initialization in the SMM and improves the execution efficiency of initialization.

Abstract: The present application relates to a starting power supply for car battery, belonging to the technical field of car accessories, comprising a housing, a power module installed inside the housing to charge the car battery, an inflation module for inflation, and a vacuumizing module for vacuumization, wherein the housing is provided with a lighting lamp that is electrically connected to the power module, and the power module is adjacent to and is spaced apart from the inflation module, and the vacuumizing module is located at the bottom of the power module. The present application has the effect of increasing the functionality of emergency power supply.

Abstract: Provided herein are methods for treating a tauopathy in a subject in need thereof, the method comprising: identifying the subject having a tauopathy: administering to the subject an effective amount of a pharmaceutical composition comprising an agent that decreases the expression and/or activity of immunoproteasome (IP), decreases the expression and/or activity of an immunoproteasome-related protein whose level is upregulated in a subject having tauopathy, increases the expression and/or activity of an immuno-proteasome-related protein whose level is downregulated in a subject having tauopathy and increases the expression and/or activity of deubiquitinase while modulating inflammatory cytokine and cytokine receptor expression, thereby treating the tauopathy in the subject.

Abstract: This application relates to similarity calculation apparatuses and methods, and storage devices. An example similarity calculation apparatus includes an input signal processing circuit, a data calculator, and at least one output processing circuit, where the data calculator includes a storage array configured to store to-be-calculated data. The input signal processing circuit is configured to: generate an operating voltage based on similarity calculation instructions, and convert an address of the to-be-calculated data in the similarity calculation instructions into a target address The data calculator is configured to: select, based on the target address, the to-be-calculated data stored in the storage array, and apply the operating voltage to the to-be-calculated data to perform similarity calculation. The at least one output processing circuit is configured to: process a signal output by the data calculator, and output a calculation result.

Abstract: Aspects of the disclosure are directed to using a set of rules to generate a framework that can allow a user of a cloud-based platform to define their objectives for altering an existing deployment or generating a new deployment of services of the user for the cloud-based platform. The rules can include elements to correlate which rules should be considered collectively as a group, which rules have dependencies on one another, and/or other external factors. The correlated rules can be further curated and filtered based on an ordering of the objectives. A resulting set of rules can represent a specific architecture aligned with the objectives of the user.