Patents by Inventor Long-Shang Juang

Long-Shang Juang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for improving the endurance of split gate flash EEPROM devices via the addition of a shallow source side implanted region
    Patent number: 5915178
    Abstract: A process for fabricating a flash EEPROM device, incorporating a shallow, heavily doped, source side region, used to improve the endurance of the flash EEPROM device, has been developed. The process features placing a shallow, ion implanted arsenic region, in the semiconductor substrate, adjacent to one side of a floating gate structure, prior to creation of the control gate structure. The addition of the shallow, ion implanted arsenic region, improves the coupling ratio at the source, which in turn results in the ability of the flash EEPROM device to sustain about 1,000,000 program/erase cycles, compared to counterparts, fabricated without the shallow, source side region, only able to sustain about 400,000 program/erase cycles.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: June 22, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: An-Min Chiang, Long-Shang Juang, Chi-Shiang Lee, Jyh-Feng Lin