Patents by Inventor Long Sheng

Long Sheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240288850
    Abstract: Various embodiments are directed to frequency and voltage tuning for systems with multiple application-specific integrated circuits (ASICs) and disclosed herein may be applied to multi-AIC systems in a variety of applications, such as high-performance computing, artificial intelligence, graphics applications, and cryptocurrency or blockchain mining functions.
    Type: Application
    Filed: April 26, 2022
    Publication date: August 29, 2024
    Applicant: Intel Corporation
    Inventors: Long SHENG, Liang CHEN, Tao ZHOU, Shuping HAN, Yan WANG, Chandra KATTA, Vikram SURESH, Chong HAN, He HAN, Tatt Hee OONG, Chee Hung CHIAN, Yi HAN, Hao CHEN
  • Publication number: 20230195511
    Abstract: Methods and apparatus relating to techniques for an energy-efficient cryptocurrency (e.g., Bitcoin) mining hardware accelerator with a spatially shared message scheduler are described. In an embodiment, a plurality of mining engines perform one or more operations for a cryptocurrency. A single scheduler processes a first portion of a message for two or more mining engines of the plurality of mining engines and pre-computation logic circuitry processes a second portion of the message for the two or more mining engines. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: March 31, 2022
    Publication date: June 22, 2023
    Applicant: Intel Corporation
    Inventors: Vikram Suresh, Amitkumar Patel, Chandra S. Katta, Sanu Mathew, Long Sheng
  • Publication number: 20230195200
    Abstract: Embodiments herein relate to optimizing the operation of multiple integrated circuits (ICs) operating in parallel. In one aspect, the ICs are arranged in a voltage-stacked configuration, and an operating frequency of each IC is controlled using a tunable replica circuit to stabilize its voltage drop. The tunable replica circuit mimics a critical path on the IC. In another aspect, an IC is divided into top and bottom portions which are in respective voltage domains on a substrate. The substrate include a deep n-well region for the higher voltage domain. In another aspect, a physically unclonable function (PUF) is used to generate identifiers for each IC among a multiple ICs on a board. Entropy sources of the PUF generate bits of the identifiers. Unstable entropy sources are identified and their bits are masked out.
    Type: Application
    Filed: June 3, 2022
    Publication date: June 22, 2023
    Inventors: Vikram B. Suresh, Sanu K. Mathew, Christopher Schaef, Chandra S. Katta, Long Sheng, Chin S. Park, Srinivasan Rajagopalan, Raju Rakha
  • Patent number: D1047899
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: October 22, 2024
    Assignee: NIO TECHNOLOGY (ANHUI) CO., LTD
    Inventors: Jingyang Yao, Maxime Le Ruyet, Zilin Chen, Kechao Li, Kris Tomasson, Colin Phipps, Shiyi Hang, Long Sheng, Sichuan Huang, Haibin Zhao, Lijian Xia, Xiang Zhang
  • Patent number: D1060226
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: February 4, 2025
    Assignee: NIO TECHNOLOGY (ANHUI) CO., LTD
    Inventors: Jingyang Yao, Kechao Li, Fan Wu, Nikhil Banwaskar, Kris Tomasson, Colin Phipps, Shiyi Hang, Qiuchen Weng, Long Sheng, Lijian Xia, Zhiqian Zhuang
  • Patent number: D1098011
    Type: Grant
    Filed: July 30, 2024
    Date of Patent: October 14, 2025
    Assignee: NIO TECHNOLOGY (ANHUI) CO., LTD
    Inventors: Jingyang Yao, Maxime Le Ruyet, Zilin Chen, Kechao Li, Kris Tomasson, Colin Phipps, Shiyi Hang, Long Sheng, Sichuan Huang, Haibin Zhao, Lijian Xia, Xiang Zhang