Abstract: A self-feedback control circuit is connected to a controller area network bus for controlling a high-level output and a low-level output, comprising a controller area network driving circuit and a replica circuit. The replica circuit is connected in parallel with the controller area network driving circuit and comprises an upper feedback path and a lower feedback path. The upper feedback path and the lower feedback path are connected jointly to a common mode, and the replica circuit provides a feedback signal from the common mode such that the feedback signal is able to be respectively transmitted to two individual transistors of the controller area network driving circuit through the upper feedback path and through the lower feedback path so as to control DC level stability of the high-level output and the low-level output.

Abstract: A slope control circuit is connected between a replica circuit and a controller area network bus. The replica circuit generates an upper and a lower feedback signal. The slope control circuit receives and is driven by the feedback signals for controlling a voltage slope of a high-level output and a low-level output. The slope control circuit comprises an upper and a lower driving circuit, individually connected between the replica circuit, the high-level output and the low-level output. The upper driving circuit and the lower driving circuit respectively include at least one charging and discharging circuit. By controlling the charging and discharging circuit, the present invention controls decreasing voltage slope of the high-level output to be symmetric to increasing voltage slope of the low-level output, and delay time of the circuit switching between different operating modes to be equivalent.

Abstract: A self-feedback control circuit is connected to a controller area network bus for controlling a high-level output and a low-level output, comprising a controller area network driving circuit and a replica circuit. The replica circuit is connected in parallel with the controller area network driving circuit and comprises an upper feedback path and a lower feedback path. The upper feedback path and the lower feedback path are connected jointly to a common mode, and the replica circuit provides a feedback signal from the common mode such that the feedback signal is able to be respectively transmitted to two individual transistors of the controller area network driving circuit through the upper feedback path and through the lower feedback path so as to control DC level stability of the high-level output and the low-level output.

Abstract: A slope control circuit is connected between a replica circuit and a controller area network bus. The replica circuit generates an upper and a lower feedback signal. The slope control circuit receives and is driven by the feedback signals for controlling a voltage slope of a high-level output and a low-level output. The slope control circuit comprises an upper and a lower driving circuit, individually connected between the replica circuit, the high-level output and the low-level output. The upper driving circuit and the lower driving circuit respectively include at least one charging and discharging circuit. By controlling the charging and discharging circuit, the present invention controls decreasing voltage slope of the high-level output to be symmetric to increasing voltage slope of the low-level output, and delay time of the circuit switching between different operating modes to be equivalent.

Abstract: A fully differential sensing apparatus and an input common mode feedback circuit are provided. The input common mode feedback circuit includes a common mode error amplifier and a plurality of adaptive conductance elements. Each adaptive conductance element behaves with a low impedance characteristic when its anode voltage is greater than its cathode voltage by a positive threshold voltage or, on the contrary, when the anode voltage of such an adaptive conductance element is lower than its cathode voltage by a negative threshold voltage, the adaptive element also behaves with a low impedance characteristic; otherwise the aforementioned adaptive conductance element behaves with a high impedance characteristic. The common mode error amplifier and a plurality of such adaptive conductance elements form a negative feedback loop to effectively maintain the input common voltage of a fully differential input amplifier, which can be used for a fully differential sensing apparatus.

Abstract: A fully differential sensing apparatus and an input common mode feedback circuit are provided. The input common mode feedback circuit includes a common mode error amplifier and a plurality of adaptive conductance elements. Each adaptive conductance element behaves with a low impedance characteristic when its anode voltage is greater than its cathode voltage by a positive threshold voltage or, on the contrary, when the anode voltage of such an adaptive conductance element is lower than its cathode voltage by a negative threshold voltage, the adaptive element also behaves with a low impedance characteristic; otherwise the aforementioned adaptive conductance element behaves with a high impedance characteristic. The common mode error amplifier and a plurality of such adaptive conductance elements form a negative feedback loop to effectively maintain the input common voltage of a fully differential input amplifier, which can be used for a fully differential sensing apparatus.

Abstract: A third order sigma-delta modulator comprises a first summing unit for receiving an input signal, a first integrator network connected to an output of the first summing unit, a second integrator network for receiving an output of the first integrator network, a second summing unit connected to an output of the second integrator network, a third integrator network connected to an output of the second summing unit, and a feed-forward path from the output of the first integrator network to an input of the second summing unit.

Abstract: A third order sigma-delta modulator comprises a first summing unit for receiving an input signal, a first integrator network connected to an output of the first summing unit, a second integrator network for receiving an output of the first integrator network, a second summing unit connected to an output of the second integrator network, a third integrator network connected to an output of the second summing unit, and a feed-forward path from the output of the first integrator network to an input of the second summing unit.