Patents by Inventor Longbiao LEI

Longbiao LEI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD OF FORMING SEMICONDUCTOR DEVICE INCLUDING DAISY-CHAINED DELAY CELLS
    Publication number: 20240333268
    Abstract: A method of forming a semiconductor device includes forming a first row of transistors extending in a first direction and including dummy transistors and active transistors. The first row includes, in a sequence from a first end to a second end, at least a first dummy group, a first delay cell, a second delay cell, and a second dummy group. The first dummy group is formed of one or more dummy transistors. The second dummy group is formed of one or more dummy transistors. The first delay cell is formed of active transistors configured as a basic inverter and a float-resistant inverter. The second delay cell is formed of active transistors configured as at least one inverter. The first row is free of dummy transistors between the first delay cell and the second delay cell.
    Type: Application
    Filed: June 11, 2024
    Publication date: October 3, 2024
    Inventors: Huaixin XIAN, Longbiao LEI, Senpei GOA, Zhang-Ying YAN, Qingchao MENG, Jerry Chang Jui KAO
  • Semiconductor device with daisy-chained delay cells and method of forming same
    Patent number: 12015410
    Abstract: A semiconductor device includes a first dummy group having a first set of dummy transistors; a first delay cell having a first set of active transistors; a second delay cell having a second set of active transistors; a second dummy group having a second set of dummy transistors; and relative to a first direction the first and second dummy groups and the first and second delay cells being arranged in a first sequence arranged as the first dummy group, the first delay cell, the second delay cell, and the second dummy group; and the first and second delay cells being free from having another dummy group therebetween.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: June 18, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY, LIMITED
    Inventors: Huaixin Xian, Longbiao Lei, Sinpei Goa, Zhang-Ying Yan, Qingchao Meng, Jerry Chang Jui Kao
  • SEMICONDUCTOR DEVICE WITH DAISY-CHAINED DELAY CELLS AND METHOD OF FORMING SAME
    Publication number: 20240056062
    Abstract: A semiconductor device includes a first dummy group having a first set of dummy transistors; a first delay cell having a first set of active transistors; a second delay cell having a second set of active transistors; a second dummy group having a second set of dummy transistors; and relative to a first direction the first and second dummy groups and the first and second delay cells being arranged in a first sequence arranged as the first dummy group, the first delay cell, the second delay cell, and the second dummy group; and the first and second delay cells being free from having another dummy group therebetween.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 15, 2024
    Inventors: Huaixin XIAN, Longbiao LEI, Sinpei GOA, Zhang-Ying YAN, Qingchao MENG, Jerry Chang Jui KAO