Abstract: An array base plate includes a substrate; a plurality of sub-pixels; and a plurality of gate lines and a plurality of data lines, wherein the plurality of gate lines intersect with the plurality of data lines, each of the sub-pixels is located at a position limited by two adjacent gate lines and two adjacent data lines, and each of the sub-pixels includes a pixel driving circuit and a light emitting device that are connected; wherein the pixel driving circuit includes: a drive module and a first control module, the pixel driving circuit further includes an auxiliary anode, the auxiliary anode is located between the anode and the substrate, and the auxiliary anode is electrically connected to the anode; the first power signal line includes a first part and a second part that are electrically connected.

Abstract: A display module, including: a display panel; a color film layer, provided on a light-emitting side of the display panel, where the color film layer includes a plurality of light-filtering portions; and a micro-lens layer, provided on a side of the color film layer away from the display panel; where, the micro-lens layer includes a plurality of first converging lenses and a plurality of second converging lenses, a gap is provided between two adjacent first converging lenses, and an orthographic projection of a first converging lens on the display panel is located within an orthographic projection of a light-filtering portion on the display panel; a second converging lens is provided in the gap between two adjacent first converging lenses, and the second converging lens is connected to the first converging lens.

Abstract: A pixel circuit, a driving method, and a display device. The pixel circuit includes a light-emitting element, a data writing circuit, a first control circuit, a driving circuit, a first power storage circuit, and a second power storage circuit. The first control circuit is configured to write a first initial voltage provided by a first initial voltage terminal into a first electrode of the light-emitting element under control of a first control signal provided by a first control terminal in a non-light-emitting phase. The driving circuit drives the light-emitting element to emit light under the control of a potential of a control terminal of the driving circuit. The present disclosure enhances the contrast in the non-light-emitting phase.

Abstract: A display substrate includes an array substrate including pixels and pixel driving circuits. A pixel driving circuit includes a driving sub-circuit and a storage sub-circuit. The storage sub-circuit includes: a first capacitor coupled to a first node and a second node, and a second capacitor coupled to the second node and a first voltage signal terminal. The driving sub-circuit is configured to generate a driving current under control of the storage sub-circuit and transmit the driving current to a light-emitting device. In a direction perpendicular to the array layer, the first plate, the second plate, the third plate and the fourth plate have an overlapping region therebetween.

Abstract: Provided is a gate drive circuit, including a plurality of shift registers and buffers in cascade, wherein each of the shift registers is configured to output a first gate scanning signal stage by stage according to a preset scanning timing; and each of the buffers is configured to perform waveform inversion on the first gate scanning signal for a plurality of times to convert the first gate scanning signal into a second gate scanning signal, wherein falling edge time of the second gate scanning signal is less than falling edge time of the first gate scanning signal.

Abstract: This disclosure provides a display device, a display panel, and a fabrication method thereof. The display panel includes a driving backplane, a first electrode layer, a pixel definition layer, a light-emitting functional layer, and a second electrode layer. The first electrode layer is arranged on a side surface of the driving backplane and includes a first electrode and a transferring ring. The pixel definition layer covers the first electrode layer and the driving backplane. The light-emitting functional layer is arranged on a surface of the first electrode layer facing away from the driving backplane, and the light-emitting functional layer is in a range of a transferring area of the driving backplane. The second electrode layer covers the pixel definition layer and the light-emitting functional layer. A boundary of the second electrode layer is inside a boundary of the pixel definition layer and is connected with the transferring ring.

Abstract: A display panel and a display apparatus are provided. The display panel includes a base substrate including a pixel circuit and a light-emitting element. The pixel circuit includes a data writing sub-circuit, a storage sub-circuit, a driver sub-circuit and a first sub-circuit. The data writing sub-circuit is configured to transmit a data signal to a first terminal of the storage sub-circuit in response to a control signal. A control electrode of the driver sub-circuit is coupled to the storage sub-circuit, a first electrode of the driver sub-circuit is configured to receive a first power supply voltage, and a second electrode is coupled to a first electrode of the light-emitting element. The first sub-circuit includes a first transistor, where a gate and a first electrode of the first transistor are both coupled to the same electrode of the driver sub-circuit.

Abstract: A driving circuit, a driving method, a display device, and a display control method are provided. The driving circuit includes multi-stage driving units and an on/off control circuit. Each of the driving units includes an input end and a driving signal output end, and each of the driving units is configured for outputting a corresponding driving signal via the driving signal output end according to an input signal provided by the input end. The input end of a first-stage driving unit is electrically connected to a start signal end. The on/off control circuit is electrically connected to an on/off control end and input ends of the multi-stage driving units, and configured for controlling the electric connection or electric disconnection of the input ends of the multi-stage driving units under the control of an on/off control signal provided by the on/off control end.

Abstract: The line drive signal enhancement circuit includes a first control unit, a second control unit, a first output unit and a second output unit. The first control unit is used for outputting the first power supply voltage to the first node or the second node under the control of the first control terminal and the second control terminal. The second control unit is used for outputting the second power supply voltage to the second node in response to the first power supply voltage on the first node, and is further used for outputting the second power supply voltage to the first node in response to the first power supply voltage on the second node.

Abstract: A pixel circuit includes a light emitting element, a driving circuit, a first energy storage circuit, a second energy storage circuit, and a writing-in control circuit; a first terminal of the first energy storage circuit is electrically connected to a control terminal of the driving circuit and a first terminal of the writing-in control circuit respectively, and a second terminal of the first energy storage circuit is electrically connected to a first terminal of driving circuit, a first terminal of the second energy storage circuit is electrically connected to a second terminal of the writing-in control circuit, and a second terminal of the second energy storage circuit is electrically connected to the writing-in terminal.

Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided. The display substrate includes multiple sub-pixels, a sub-pixel includes a first region (q1), a gap region (q3) and a second region (q2); the sub-pixel includes a first transistor (T1) including first active layer (1) and first gate electrode (11), a second transistor (T2) including second active layer (2) and second gate electrode (12) and a third transistor (T3) including third active layer (3) and third gate electrode (13); the first active layer is disposed in the first region, the second active layer and the third active layer are disposed in the second region, and via holes through which the first gate electrode and the third gate electrode are connected to a scan signal line and a via hole through which the second gate electrode is connected to the first transistor are provided in the gap region.

Abstract: An array base plate includes a silicon substrate including multiple cascaded EOA units disposed at a peripheral area; the EOA units are electrically connected to a pixel driving unit; each EOA unit includes an input circuit transmitting a signal input by a light-emitting control signal input line to the EOA unit; a first control circuit transmitting a second power signal input by a second power signal line to a first node, and transmitting a first power signal input by a first power signal line to a second node; a second control circuit transmitting a second clock signal to a third node or transmitting the second power signal to the third node; a pull-up circuit transmitting the first power signal to a light-emitting control signal output line, and a pull-down circuit transmitting the second power signal to the light-emitting control signal output line.

Abstract: A pixel circuit, a driving method, and a display device. The pixel circuit includes a light-emitting element, a data writing circuit, a first control circuit, a driving circuit, a first power storage circuit, and a second power storage circuit. The first control circuit is configured to write a first initial voltage provided by a first initial voltage terminal into a first electrode of the light-emitting element under control of a first control signal provided by a first control terminal in a non-light-emitting phase. The driving circuit drives the light-emitting element to emit light under the control of a potential of a control terminal of the driving circuit. The present disclosure enhances the contrast in the non-light-emitting phase.

Abstract: A driving circuit, a driving method, a display device, and a display control method are provided. The driving circuit includes multi-stage driving units and an on/off control circuit. Each of the driving units includes an input end and a driving signal output end, and each of the driving units is configured for outputting a corresponding driving signal via the driving signal output end according to an input signal provided by the input end. The input end of a first-stage driving unit is electrically connected to a start signal end. The on/off control circuit is electrically connected to an on/off control end and input ends of the multi-stage driving units, and configured for controlling the electric connection or electric disconnection of the input ends of the multi-stage driving units under the control of an on/off control signal provided by the on/off control end.

Abstract: The line drive signal enhancement circuit includes a first control unit, a second control unit, a first output unit and a second output unit. The first control unit is used for outputting the first power supply voltage to the first node or the second node under the control of the first control terminal and the second control terminal. The second control unit is used for outputting the second power supply voltage to the second node in response to the first power supply voltage on the first node, and is further used for outputting the second power supply voltage to the first node in response to the first power supply voltage on the second node.

Abstract: An array base plate includes a silicon substrate including multiple cascaded EOA units disposed at a peripheral area; the EOA units are electrically connected to a pixel driving unit; each EOA unit includes an input circuit transmitting a signal input by a light-emitting control signal input line to the EOA unit; a first control circuit transmitting a second power signal input by a second power signal line to a first node, and transmitting a first power signal input by a first power signal line to a second node; a second control circuit transmitting a second clock signal to a third node or transmitting the second power signal to the third node; a pull-up circuit transmitting the first power signal to a light-emitting control signal output line, and a pull-down circuit transmitting the second power signal to the light-emitting control signal output line.

Abstract: A driving circuit includes a driving signal output terminal, a first node control circuit, an on-off control circuit and a first output circuit. The first node control circuit controls to connect or disconnect the first node and the first voltage terminal under the control of a first control signal, and control to connect or disconnect the first node and the first voltage terminal under the control of a first clock signal; the first control terminal is different from the first clock signal terminal. The on-off control circuit controls to connect or disconnect the first node and the first output control terminal under the control of a second voltage signal; the first output circuit controls to connect or disconnect the driving signal output terminal and the first clock signal terminal under the control of a potential of the first output control terminal.

Abstract: The line drive signal enhancement circuit includes a first control unit, a second control unit, a first output unit and a second output unit. The first control unit is used for outputting the first power supply voltage to the first node or the second node under the control of the first control terminal and the second control terminal. The second control unit is used for outputting the second power supply voltage to the second node in response to the first power supply voltage on the first node, and is further used for outputting the second power supply voltage to the first node in response to the first power supply voltage on the second node.

Abstract: The present disclosure provides a line drive signal enhancement circuit, a shift register unit, and a display panel, and relates to the technical field of display. The line drive signal enhancement circuit includes a control unit, an inverter unit, a first output unit and a second output unit. The control unit has a first peripheral control terminal and a second peripheral control terminal respectively loaded with two inverted signals, and the input terminal is electrically connected with the first power supply lead. The first output unit and the second output unit both have two input terminals. The two input terminals are respectively electrically connected with the first power supply lead and the second power supply lead. The output terminal of the control unit is electrically connected with the control terminal of the first output unit and/or the control terminal of the second output unit.

Abstract: The present disclosure provides a line drive signal enhancement circuit, a shift register unit, and a display panel, and relates to the technical field of display. The line drive signal enhancement circuit includes a control unit, an inverter unit, a first output unit and a second output unit. The control unit has a first peripheral control terminal and a second peripheral control terminal respectively loaded with two inverted signals, and the input terminal is electrically connected with the first power supply lead. The first output unit and the second output unit both have two input terminals. The two input terminals are respectively electrically connected with the first power supply lead and the second power supply lead. The output terminal of the control unit is electrically connected with the control terminal of the first output unit and/or the control terminal of the second output unit.