Patents by Inventor Longqiang L. Zu

Longqiang L. Zu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6879494
    Abstract: A circuit package has been described for routing long traces between an electronic circuit, such as a phase locked loop, and external circuit components. The traces are routed through two substrates. In each substrate, the traces are routed primarily on a layer adjacent to and between a pair ground planes located close to the traces. Degassing apertures are located to the side of the long traces to avoid interfering with the shielding provided by the grounds planes. The circuit package uses two power plated through holes and two ground plated through holes to reduce the noise on the power supply lines. The circuit package also separates the signal carrying plated through holes from the power plated through holes, which reduces noise on the long traces. Noise is further reduced on the long traces by using the ground plated through holes to shield the signal carrying plated through holes from noise generated at the power plated through holes.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: April 12, 2005
    Assignee: Intel Corporation
    Inventors: Longqiang L. Zu, Jennifer A. Hester
  • Publication number: 20030206405
    Abstract: A circuit package has been described for routing long traces between an electronic circuit, such as a phase locked loop, and external circuit components. The traces are routed through two substrates. In each substrate, the traces are routed primarily on a layer adjacent to and between a pair ground planes located close to the traces. Degassing apertures are located to the side of the long traces to avoid interfering with the shielding provided by the grounds planes. The circuit package uses two power plated through holes and two ground plated through holes to reduce the noise on the power supply lines. The circuit package also separates the signal carrying plated through holes from the power plated through holes, which reduces noise on the long traces. Noise is further reduced on the long traces by using the ground plated through holes to shield the signal carrying plated through holes from noise generated at the power plated through holes.
    Type: Application
    Filed: May 27, 2003
    Publication date: November 6, 2003
    Applicant: Intel Corporation
    Inventors: Longqiang L. Zu, Jennifer A. Hester
  • Patent number: 6594153
    Abstract: A circuit package has been described for routing long traces between an electronic circuit, such as a phase locked loop, and external circuit components. The traces are routed through two substrates. In each substrate, the traces are routed primarily on a layer adjacent to and between a pair ground planes located close to the traces. Degassing apertures are located to the side of the long traces to avoid interfering with the shielding provided by the grounds planes. The circuit package uses two power plated through holes and two ground plated through holes to reduce the noise on the power supply lines. The circuit package also separates the signal carrying plated through holes from the power plated through holes, which reduces noise on the long traces. Noise is further reduced on the long traces by using the ground plated through holes to shield the signal carrying plated through holes from noise generated at the power plated through holes.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: July 15, 2003
    Assignee: Intel Corporation
    Inventors: Longqiang L. Zu, Jennifer A. Hester