Patents by Inventor Loren P. Staley

Loren P. Staley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Distributed-memory multiprocessor computer system with directory-based cache coherency with ambiguous mappings of cached data to main-memory locations
    Patent number: 6199147
    Abstract: A distributed-memory multiprocessor system uses fast and main coherency directories to implement cache coherency. The main directory is stored with user data in main memory and includes sufficient information to determine which memory cells have cached copies of user data stored in main memory. In addition, the main directories specify the states of the cached data. The fast directories cache only some of the main-directory information for only a fraction of the main-memory locations at any given time. The fast directories are tagless in one mode and use partial tags in another mode. The fast-directory information is accessed concurrently with main-directory information in response to data requests. Directory information is retrieved first from the fast directory and is used to launch predictive recalls. Subsequently received main-directory information is used to validate or invalidate the predictive recalls.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: March 6, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Kenneth K. Smith, Loren P. Staley, Sorin Lacobovici
  • Distributed memory multiprocessor computer system with directory based cache coherency with ambiguous mapping of cached data to main-memory locations
    Patent number: 6055610
    Abstract: A distributed-memory multiprocessor system uses fast and main coherency directories to implement cache coherency. The main directory is stored with user data in main memory and includes sufficient information to determine which memory cells have cached copies of user data stored in main memory. In addition, the main directories specify the states of the cached data. The fast directories cache only some of the main-directory information for only a fraction of the main-memory locations at any given time. The fast directories are tagless in one mode and use partial tags in another mode. The fast-directory information is accessed concurrently with main-directory information in response to data requests. Directory information is retrieved first from the fast directory and is used to launch predictive recalls. Subsequently received main-directory information is used to validate or invalidate the predictive recalls.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: April 25, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Kenneth K. Smith, Loren P. Staley, Sorin Iacobovici