Abstract: An emitter-coupled logic circuit provides differential outputs which are delivered to pairs of transistors in emitter-coupled logic (ECL) switches. The differential outputs allow additional ECL switches to be connected between a positive and negative supply voltage. A unique current source for the ECL switches includes diodes and/or transistors connected in parallel with the ECL switches such that the supply current is relatively independent of fluctuations in the supply voltage and yet the voltage drop across the current source is minimized.

Abstract: An ECL circuit including first and second transistors driven by differential input signals. Both transistors include emitters connected to a common node. The first transistor has a first collector connected to a first output terminal and a first base connected to receive a first biasing signal. The second transistor has a second collector connected to a second output terminal and a second base connected to receive a second biasing signal. The first and second biasing signals driving the first and second transistors are logical complements.

Abstract: A voltage is provided by a master circuit and received by a plurality of slave circuits over a bus. The master circuit includes a V.sub.bb reference circuit, a temperature compensation and V.sub.cse reference circuit, and a voltage step-up and buffering circuit coupled to the bus. Each of the slave circuits has a pair of transistors coupled to the bus in an emitter-follower configuration to step down the voltage from the master circuit and to provide a voltage reference. The voltage provided to the bus varies as it propagates through the bus. Accordingly, a plurality of unconnected resistors are formed in the portions of the silicon substrate which contain the master and/or slave circuits. When formed in the master circuit, the resistors are located in the V.sub.bb reference circuit. When formed in the slave circuit, the resistors are located in close proximity to the output transistors.

Abstract: A circuit for providing a voltage reference level using a master circuit and a plurality of slave circuits. The master circuit includes a V.sub.bb reference circuit, a temperature compensation and V.sub.cse reference circuit, and a voltage step-up and buffering circuit. Each of the slave circuits has a pair of transistors in an emitter-follower configuration to step down the voltage and drive the circuitry requiring the voltage reference.