Patents by Inventor Lorenzo Crespi

Lorenzo Crespi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190198043
    Abstract: A voice-activity detector (VAD) system comprises a microphone operable to receive and to process audio inputs from an environment to generate an analog audio input signal. The system further comprises an analog VAD operable to process the analog audio input signal to perform an initial detection of human speech, and operable to send a wake up command to a digital signal processing chain to awaken the digital signal processing chain from a sleep mode, when the analog VAD detects human speech. Further, the system comprises the digital signal processing chain operable to process the analog audio input signal to perform a secondary detection of human speech, and operable to output a signal indicating that human speech is detected, when the digital signal processing chain detects human speech. In one or more embodiments, the secondary detection of human speech is more accurate than the initial detection of human speech.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 27, 2019
    Inventors: Lorenzo Crespi, Marco Croce, Andrea Baschirotto, Piero Malcovati
  • Patent number: 10333506
    Abstract: Systems and methods according to one or more embodiments are provided for a current comparator with biasing circuitry to provide for low power consumption and high-speed performance. In one example, a system includes an input port to receive a current pulse and an amplifier configured to provide a voltage pulse at an output port in response to the current pulse. The system also includes a first biasing circuit coupled between the output port and the input port to selectively limit a voltage at the input port. The system further includes a second biasing circuit coupled to the amplifier to selectively adjust a bias of the amplifier.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: June 25, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Lorenzo Crespi, Kyehyung Lee, Davide Cartasegna
  • Patent number: 10333473
    Abstract: Systems and methods are provided for improved stability of audio amplifiers that incorporate external speaker connectivity. In one example, a system includes an audio amplifier circuit comprising two or more amplifier stages and a stability resistor and configured to receive an audio input signal, the audio amplifier circuit configured for at least two modes of operation, a first mode having a high input transconductance and the stability resistor is coupled to an output of the audio amplifier circuit, and a second mode having a lower input transconductance and the stability resistor is decoupled from the output of the audio amplifier circuit. The system further includes an amplitude detection circuit configured to provide a signal mode detection signal, an amplifier switching circuit configured to adjust a variable input transconductance of at least one of the amplifier stages, and a load switching circuit configured to couple and decouple the stability resistor at the output of the audio amplifier circuit.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: June 25, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Dan Shen, Balakishan Challa, Lorenzo Crespi
  • Patent number: 10298245
    Abstract: An analog-to-digital conversion (ADC) system includes a transconductance amplifier, loop filter, quantizer, logic circuit, and digital-to-analog converter (DAC). The transconductance amplifier is configured to generate a current signal in response to an audio signal. The loop filter is connected to the transconductance amplifier and configured to generate a filtered signal based on the current signal. The quantizer is configured to generate a digital representation of the filtered signal. The logic circuit is configured to generate control signals based on the digital representation. The DAC is coupled to the loop filter's and the transconductance amplifier's output. The DAC includes three-level unit elements, where each unit element is configured to provide one of two signal levels or no signal to the loop filter in response to control signals from the logic circuit. Such an ADC system may allow for a high dynamic range while maintaining low power consumption and low noise.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: May 21, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Claudio De Berti, Lorenzo Crespi
  • Publication number: 20190120883
    Abstract: Systems and methods according to one or more embodiments are provided for sensing a current at an output of a switching amplifier. In one example, a system includes a first transistor switch coupled to a load configured to conduct a current in the load responsive to a first pulse width modulated control signal coupled to a gate terminal of the first transistor switch. The system further includes a second transistor switch configured to conduct the current in the load responsive to a second pulse width modulated control signal coupled to a gate terminal of the second transistor switch. A shielding switch is coupled between the load and a current sensing circuit, wherein the shielding switch is configured to provide a small signal voltage to the current sensing circuit in response to the second pulse width modulated control signal, the current sensing circuit is configured to sense the current traveling through the load responsive to the small signal voltage.
    Type: Application
    Filed: October 20, 2017
    Publication date: April 25, 2019
    Inventors: Dan Shen, Lorenzo Crespi
  • Patent number: 10211848
    Abstract: Systems and methods according to one or more embodiments are provided for improving noise performance in a delta sigma modulator comprising an adder, quantizer and nth order filter. The adder is operable to receive an input signal and a feedback signal, and output a modified input signal. The quantizer is operable to receive the modified input signal and output a quantized output signal, the quantized output signal having a corresponding quantization error. The nth order filter is operable to receive a quantization error value and generate the feedback signal, the nth order filter comprising a first memory element having a first error value, a second memory element having a second error value, and a gravity component operable to converge the first error value and the second error value when the input signal is approximately zero.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: February 19, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Dan Shen, Lorenzo Crespi
  • Publication number: 20180288543
    Abstract: Systems and methods according to one or more embodiments are provided for correcting a current measurement through a speaker in an audio system. In one example, a system for driving a speaker includes an output stage configured to drive a current through the speaker. The system further includes a first and second current sensor coupled to the output stage and configured to measure a positive current including a first measurement error and a negative current including a second measurement error through the speaker, respectively. The system further includes a processing block coupled to the first and second current sensors to receive the measured positive and negative current signals and configured to add a positive offset value to an input of each first and second current sensors, determine the first and second measurement errors, and correct a measured current using the positive and negative currents and the determined first and second measurement errors.
    Type: Application
    Filed: April 2, 2018
    Publication date: October 4, 2018
    Inventors: Dan Shen, Davide Cartasegna, Ketan B. Patel, Lorenzo Crespi
  • Patent number: 10085089
    Abstract: Systems and methods according to one or more embodiments are provided for sensing a current at an output of a switching amplifier. In one example, a system includes a first transistor switch coupled to a load configured to conduct a current in the load responsive to a first pulse width modulated control signal and a second transistor switch coupled to the load configured to conduct the current in the load responsive to a second pulse width modulated control signal. The system further includes a sample and hold circuit coupled between the load and a current sensing circuit configured to sample a voltage at the second transistor switch for a pre-determined sample time period in response to a midpoint of a second pulse width modulated control signal time period, and configured to provide the sampled voltage to the current sensing circuit.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: September 25, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Dan Shen, Lorenzo Crespi, Davide Cartasegna
  • Patent number: 10084369
    Abstract: Methods and systems for implementing a closed loop DC-DC converter utilize a compensator to stabilize the output voltage of the DC-DC converter while improving the loop gain in the band of interest. A compensator may be implemented by an operational amplifier and a feedback circuit. The operational amplifier may be configured to receive a fraction of sensed output voltage at the non-inverting terminal and compare the sensed output voltage with the voltage received at the inverting terminal to generate an error signal which is used to determine the duty cycle of a pulse-width modulated signal.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: September 25, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Dan Shen, Lorenzo Crespi
  • Publication number: 20180190256
    Abstract: Systems and methods according to one or more embodiments are provided for a hum reduction circuit implemented to provide a ground path between an audio generating device and a powered headset. In one example, a system includes a jack configured to accept a plug comprising a first electrical ground connection. The system also includes a switch coupled to the jack at a first end and coupled to second electrical ground connection at a second end. The system also includes the switch is configured to couple to the first electrical ground at the first end. The system further includes a bias control signal coupled to the switch, configured to control a switch bias, where a first switch bias electrically couples the first electrical ground to the second electrical ground, and a second switch bias electrically decouples the first electrical ground from the second electrical ground.
    Type: Application
    Filed: January 3, 2018
    Publication date: July 5, 2018
    Inventors: Chandrashekar Reddy Ayya, Lorenzo Crespi, Brian Walter Friend
  • Publication number: 20180183320
    Abstract: Methods and systems for implementing a closed loop DC-DC converter utilize a compensator to stabilize the output voltage of the DC-DC converter while improving the loop gain in the band of interest. A compensator may be implemented by an operational amplifier and a feedback circuit. The operational amplifier may be configured to receive a fraction of sensed output voltage at the non-inverting terminal and compare the sensed output voltage with the voltage received at the inverting terminal to generate an error signal which is used to determine the duty cycle of a pulse-width modulated signal.
    Type: Application
    Filed: December 22, 2017
    Publication date: June 28, 2018
    Inventors: Dan Shen, Lorenzo Crespi
  • Publication number: 20180145697
    Abstract: An audio digital-to-analog converter (DAC) achieves high dynamic range with low power consumption using a segmented DAC, also referred to as a noise shaped splitter. The noise shaped splitter is dynamically reconfigured based on envelope detection that tracks the amplitude of an n-bit digital input signal to the segmented DAC. The amplitude of the n-bit digital input signal can be expressed as the magnitude of a numerical value corresponding to the n bits of the digital signal. Based on the amplitude of the digital input signal, certain segments of the segmented DAC are bypassed and the components of each bypassed segment are turned off, saving power and reducing noise, and achieving improved dynamic range along with lower power consumption.
    Type: Application
    Filed: November 22, 2017
    Publication date: May 24, 2018
    Inventors: Lorenzo Crespi, Claudio De Berti
  • Publication number: 20180131359
    Abstract: Systems and methods according to one or more embodiments are provided for a current comparator with biasing circuitry to provide for low power consumption and high-speed performance. In one example, a system includes an input port to receive a current pulse and an amplifier configured to provide a voltage pulse at an output port in response to the current pulse. The system also includes a first biasing circuit coupled between the output port and the input port to selectively limit a voltage at the input port. The system further includes a second biasing circuit coupled to the amplifier to selectively adjust a bias of the amplifier.
    Type: Application
    Filed: November 8, 2017
    Publication date: May 10, 2018
    Inventors: Lorenzo Crespi, Kyehyung Lee, Davide Cartasegna
  • Patent number: 9906122
    Abstract: A capacitive voltage converter providing multiple gain modes comprising a switched capacitor array having a voltage input and a voltage output. A skip gating control coupled to the switched capacitor array and configured to control a switch resistance value of the switched capacitor array, and to control a switching sequence of the switched capacitor array. An override control coupled to the skip gating control and the switched capacitor array, the override control configured to detect transitions in a gain mode and to modify the switch resistance value of the switched capacitor array and the switching sequence of the switched capacitor array for a finite amount of time following the gain mode transition.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: February 27, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Lorenzo Crespi, Lakshmi Murukutla
  • Publication number: 20180004238
    Abstract: Systems and methods according to one or more embodiments are provided for gate boosted drivers for integrated power stages. In one example, a gate driver includes an output stage comprising an n-channel metal-oxide-semiconductor (NMOS) pull-up transistor and an NMOS pull-down transistor, where the NMOS pull-up transistor and the NMOS pull-down transistor are coupled at an output node. The gate driver further includes a bootstrap circuit comprising a main bootstrap capacitor, where the bootstrap capacitor provides a supply voltage for driving the NMOS pull-up transistor. The gate driver further includes a high voltage generator coupled with the main bootstrap capacitor via a transistor switch and a replica bootstrap circuit comprising a replica bootstrap capacitor. The replica bootstrap circuit generates a reference voltage that regulates a drain current of the transistor switch, and the regulated drain current of the transistor switch charges the main bootstrap capacitor from the high voltage generator.
    Type: Application
    Filed: June 26, 2017
    Publication date: January 4, 2018
    Inventors: Dan Shen, Lorenzo Crespi
  • Patent number: 9831884
    Abstract: Noise and distortion reduction in a signal processed through analog circuitry includes providing noise reduction circuitry to reduce signal noise generated by at least one analog circuit element. The noise reduction circuitry is adaptively configured to adjust a rate to apply noise reduction to the signal without introducing unwanted distortion. Distortion reduction circuitry is adaptively configured to adjust a rate to apply distortion reduction to the signal without introducing unwanted noise. The signal is processed through the analog circuitry using the adaptively configured noise reduction circuitry and adaptively configured distortion reduction circuitry to reduce both noise and distortion in the signal.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: November 28, 2017
    Assignee: Synaptics Incorporated
    Inventors: Dan Shen, Lorenzo Crespi
  • Publication number: 20170288690
    Abstract: Noise and distortion reduction in a signal processed through analog circuitry includes providing noise reduction circuitry to reduce signal noise generated by at least one analog circuit element. The noise reduction circuitry is adaptively configured to adjust a rate to apply noise reduction to the signal without introducing unwanted distortion. Distortion reduction circuitry is adaptively configured to adjust a rate to apply distortion reduction to the signal without introducing unwanted noise. The signal is processed through the analog circuitry using the adaptively configured noise reduction circuitry and adaptively configured distortion reduction circuitry to reduce both noise and distortion in the signal.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 5, 2017
    Inventors: Dan Shen, Lorenzo Crespi
  • Patent number: 9515646
    Abstract: A grounding switch is described which operates properly even in the presence of negative voltages on a signal line. The grounding switch uses isolated field effect transistors that have their substrates tied to different voltages. The isolated field effect transistor has a gate voltage and substrate voltage which can be pulled down to a negative voltage when the signal line has a negative voltage allowing the switch to remain open even with a negative voltage.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: December 6, 2016
    Assignee: CONEXANT SYSTEMS, INC.
    Inventors: Christian Larsen, Lorenzo Crespi
  • Patent number: 9485568
    Abstract: A driver controller comprising a state machine for controlling transitions between a plurality of states. An output switch for providing a low impedance path to ground during transition periods. An output stage for decoupling output signal from driver amplifier during the transition periods.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: November 1, 2016
    Assignee: CONEXANT SYSTEMS, INC.
    Inventors: Christian Larsen, Lorenzo Crespi, Mouna Elkhatib, Mary Xiao-Hua Lu, James Bunde Villadsen Skov
  • Patent number: 9319768
    Abstract: A system for detecting a jack configuration comprising a first plurality of switches configured to couple a first headphone jack position to ground. A second plurality of switches configured to couple a second headphone jack position to ground. A microphone bias circuit for applying a microphone bias signal to the second headphone jack position when the first headphone jack position is coupled to ground, and for applying the microphone bias signal to the first headphone jack position when the second headphone jack position is coupled to ground.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: April 19, 2016
    Assignee: CONEXANT SYSTEMS, INC.
    Inventors: Christian Larsen, Lorenzo Crespi, Brian W. Friend