Abstract: A floating gate memory device includes a substrate of semiconductor material having on a surface thereof a layer of insulating material. On the insulating layer is a floating gate of conductive polycrystalline silicon with the floating gate having a textured outer surface and relatively smoother sidewalls. A second layer of insulating material extends over the outer surface and sidewalls of the floating gate. The portion of the second insulating material over the outer surface of the floating gate has a textured surface and is thinner than the portions of the second insulating layer over the sidewalls of the floating gate. A control gate is over the second insulating layer and extends over the outer surface and sidewalls of the floating gate. The control gate is of conductive polycrystalline silicon and has an inner surface portion over the textured outer surface of the control gate which is textured and has undulations which substantially follow the undulations of the textured surface of the floating gate.

Abstract: A silicon-on-insulator (SOI) device is fabricated by forming at least one island of semiconductor material on a surface of an insulating material. Silicon is then formed on the areas which surround the at least one island. The silicon is oxidized to form silicon dioxide regions which surround the at least one island.

Abstract: A method of making a floating gate memory cell which relies on control gate to floating gate conduction to charge and discharge the floating gate. The gate oxide and inter-level dielectric thicknesses are independently controlled by using a mask which can compensate for the different substrate and floating gate oxidation rates.

Abstract: A method of making a floating gate memory cell wherein the capacitance between the control gate and floating gate can be independently controlled. Independent capacitance control is achieved by forming the inter-level dielectric in a step which is independent of the gate oxide growth process.

Abstract: An improvement in the formation of thick, i.e. 1,200 nanometers and greater, layers of silicon dioxide on a substrate is provided. The silicon dioxide layer is provided by the alternate deposition and oxidation of thin layers of silicon. In comparison to conventional oxidation, the time required for formation of a thick layer of silicon dioxide in accordance with the disclosed process is substantially reduced.

Abstract: A method of making a semiconductor device having multi-levels of polycrystalline silicon conductors insulated from each other and from the silicon substrate on which the semiconductor device if formed. In this method, each of the silicon oxide layers insulating the conductors from each other and from the substrate surface are each individually formed by thermal oxidation so that each is tailored in thickness and electrical characteristics for the particular purpose that each serves.