Abstract: A MOSFET is used to protect a battery driven load against the effects of a reverse-connected battery. This invention is particularly suitable for use with loads, such as those commonly found in motor vehicles, which contain semiconductor devices that may be severely damaged by a reverse voltage. The source of the MOSFET is connected to the positive terminal of the battery, and a gate driver circuit is used to provide a gate to source voltage sufficient to turn the MOSFET on when the battery is properly connected. If the battery is connected in reverse, the gate driver turns the MOSFET off, and the intrinsic body-drain diode in the MOSFET prevents a reverse current flow through the load. In conjunction with the MOSFET, a sensing device sends out a warning signal which may be used, for example, to turn off a portion of the load if the output of the battery falls below a level necessary to maintain the MOSFET in a fully on condition.

Abstract: A unique current sense means is provided in which a bonding wire or similar conductor is routed to one or more Hall effect current sensing devices which, in one embodiment, is fabricated as part of a power semiconductor device.

Abstract: A switch interface circuit provides control voltages to the gate of a power MOSFET while protecting the power MOSFET from breakdown caused by transient signals and over-voltage. In one embodiment, a large JFET acts as gate-source shunt and a small JFET serves as a current source to turn the power MOSFET off when the turn-on current is removed. The JFET gate-drain and gate-source breakdown provides a voltage limitation to protect the MOSFET from gate overvoltage. Alternatively, Zener diodes and MOS transistors are used in lieu of the JFET for shorting the power MOSFET gate to source during turn-off and limiting its gate to source voltage during turn-on.

Abstract: A Zener diode (D) exhibiting subsurface breakdown includes a cathode (36) formed entirely within the emitter (22, 28) of a vertical PNP transistor (Q). The base (16) and collector (11) of the PNP transistor are resistively coupled to ground. The emitter of the PNP transistor functions as the anode of the Zener diode. Because of this, it is unecessary to provide an emitter contact. The PNP transistor compensates for changes in Zener breakdown voltage caused by changes in temperature. Because the PNP transistor is formed directly underneath the Zener diode, the temperature of the PNP transistor accurately tracks that of the Zener diode and therefore provides better temperature compensation. Also, because the cathode of the Zener diode is formed directly in the emitter of the PNP transistor, there is no lateral current flow and attendant voltage drop in the emitter of the PNP transistor.

Abstract: A thin film resistor is formed using sputtering to deposit a thin film of resistive material on an insulating surface. The sputter target is composed of constituents which are normally present in relatively large quantities in thin film resistors, such as chromium silicide and silicon carbide. The sputtered thin film material is formed into resistor regions. An insulating layer is deposited over the thin film material. Ions (e.g., boron ions) are then implanted into the thin film through the insulating layer. These implanted constituents have a significant effect on the temperature coefficient and sheet resistance of the thin film resistor. Ion implantation of these constituents enables more control over the characteristics of the thin film resistor as compared to prior art techniques not using ion implantation.

Abstract: A power supply (100) includes a first lead (12) for receiving an input voltage (Vin) and an inductor (L1) and a switching transistor (Q1) coupled in series between the input lead and ground. The node (N1) between the inductor (L1) and switching transistor (Q1) is coupled through a diode (D1) to an output terminal (14). When the switching transistor is on current flow causes energy to be stored in the inductor. When the switching transistor turns off, the energy stored in the inductor is provided to a load (RL) coupled to the output terminal. The on-time of the transistor is controlled by a comparator (20) which receives a first voltage (V3) proportional to the current through the switching transistor and a second voltage (V4). The second voltage decreases linearly with respect to time at a rate dependent on the difference between the voltage at the output terminal (Vout) and a reference voltage (Vref).

Abstract: A high voltage field effect transistor includes a source region in a first major surface of a semiconductor body and a drain region in a second major surface of the semiconductor body. A first gate region is formed in the first major surface and is surrounded by the source regions. A second gate region surrounds the source region and includes a buried region extending into the semiconductor body between the source and drain regions. The buried gate structure can be fabricated by epitaxial grown over diffused regions in a semiconductor substrate, or alternatively ion implantation can be employed to form the buried gate regions.

Abstract: Analog to digital converter of the type in which an analog input signal is integrated and charge is applied to the integrating capacitor in predetermined measured quantities to offset or balance the effect of the input signal. A counter is incremented and decremented in accordance with the balancing charge to provide a count corresponding to the input signal. Means is included for eliminating errors due to offset voltages and imperfections in the virtual ground of the integrator, and the operating level of the integrator during a conversion is set independently of the sources which supply the balancing charge.

Abstract: A sample and hold circuit uses two amplifiers the second being a Miller integrator and the first a comparator which compares the feed back stored capacitor voltage to the sampled voltage to bring the stored voltage of the capacitor to the sample voltage value. This stored voltage will have included in it the offset voltage of the first amplifier. However on readout this offset voltage is eliminated by disconnecting the sample input and also the connection between the output of the first amplifier and the input of the second and instead connecting the output of the first amplifier to the sample input and taking the output from this interconnection line. Since the noninverting or plus terminal of the first amplifier has impressed upon it the stored voltage of the capacitor the unwanted offset voltage is effectively subtracted. The foregoing sample and hold circuit also finds preferred use in a 12 bit recirculating A to D converter where cumulative offset errors would cause error.