Abstract: A metal oxide semiconductor field effect transistor preferably fabricated with a silicon-on-insulator process has a first semiconductor region and a second semiconductor region in a spaced relationship thereto A body structure is defined by a channel segment between the first semiconductor region and the second semiconductor region, and a first extension segment structurally contiguous with the channel segment. A shallow trench isolation structure surrounds the first semiconductor region, the second semiconductor region, and the body structure, with a first extension interface being defined between the shallow trench isolation structure and the first extension segment of the body structure to reduce leakage current flowing from the second semiconductor region to the first semiconductor region through a parasitic path of the body structure.

Abstract: A metal oxide semiconductor field effect transistor preferably fabricated with a silicon-on-insulator process has a first semiconductor region and a second semiconductor region in a spaced relationship thereto A body structure is defined by a channel segment between the first semiconductor region and the second semiconductor region, and a first extension segment structurally contiguous with the channel segment. A shallow trench isolation structure surrounds the first semiconductor region, the second semiconductor region, and the body structure, with a first extension interface being defined between the shallow trench isolation structure and the first extension segment of the body structure to reduce leakage current flowing from the second semiconductor region to the first semiconductor region through a parasitic path of the body structure.

Abstract: A metal oxide semiconductor field effect transistor preferably fabricated with a silicon-on-insulator process has a first semiconductor region and a second semiconductor region in a spaced relationship thereto A body structure is defined by a channel segment between the first semiconductor region and the second semiconductor region, and a first extension segment structurally contiguous with the channel segment. A shallow trench isolation structure surrounds the first semiconductor region, the second semiconductor region, and the body structure, with a first extension interface being defined between the shallow trench isolation structure and the first extension segment of the body structure to reduce leakage current flowing from the second semiconductor region to the first semiconductor region through a parasitic path of the body structure.

Abstract: A radio frequency (RF) power amplifier circuit with a diode linearizer circuit. The power amplifier circuit has an input and an output, as well as a power amplifier transistor with a first terminal connected to the input, a second terminal connected to the output, and a third terminal. The linearizer circuit is connected to the third terminal and to ground, and has a non-linear current-voltage curve as well as a non-linear capacitance. The linearizer circuit reduces inter-modulation products in a current through the power amplifier transistor from the second terminal to the third terminal that corresponds to an input signal applied to the input.

Abstract: A radio frequency (RF) filter circuit for rejecting one or more spurious components of an input signal has a first resonator circuit including a first capacitor and a first coupled inductor pair of a first inductor and a second inductor, and a second resonator circuit with a second capacitor and a second coupled inductor pair of a third inductor and a fourth inductor. First and second resonator coupling capacitors are connected to the first resonator circuit and the second resonator circuit. A first port and a second port are connected to the first resonator circuit and the second resonator, with the filtered signal of the input signal passed through both the first resonator circuit and the second resonator circuit being output.

Abstract: A radio frequency (RF) power amplifier circuit with a diode linearizer circuit. The power amplifier circuit has an input and an output, as well as a power amplifier transistor with a first terminal connected to the input, a second terminal connected to the output, and a third terminal. The linearizer circuit is connected to the third terminal and to ground, and has a non-linear current-voltage curve as well as a non-linear capacitance. The linearizer circuit reduces inter-modulation products in a current through the power amplifier transistor from the second terminal to the third terminal that corresponds to an input signal applied to the input.

Abstract: A radio frequency (RF) filter circuit for rejecting one or more spurious components of an input signal has a first resonator circuit including a first capacitor and a first coupled inductor pair of a first inductor and a second inductor, and a second resonator circuit with a second capacitor and a second coupled inductor pair of a third inductor and a fourth inductor. First and second resonator coupling capacitors are connected to the first resonator circuit and the second resonator circuit. A first port and a second port are connected to the first resonator circuit and the second resonator, with the filtered signal of the input signal passed through both the first resonator circuit and the second resonator circuit being output.

Abstract: A current mirror circuit connectible to an amplifier circuit to set a bias point thereof includes a current mirror circuit, and a bias resistor connected thereto. The bias resistor is connectible to the amplifier circuit. A first helper circuit is connected in parallel with the bias resistor, and is selectively activated for a first predetermined duration by a first control signal. The activated first helper circuit defines a lower resistance path relative to the bias resistor to shorten a rising transient response of the amplifier circuit as the current mirror circuit is activated.

Abstract: An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components.

Abstract: A radio frequency front end circuit includes an output signal transmission line, an amplifier circuit with an input connected to a radio frequency signal source and an output connected to the output signal transmission line. A harmonic suppression circuit is connected to the amplifier circuit, and includes an active circuit element having a frequency-dependent impedance and is tuned as a reflective trap with a negative capacitance for one or more rejection frequency ranges each corresponding to a multiple of a fundamental frequency of a signal generated by the radio frequency signal source.

Abstract: A power detector with a detection signal input connectable to a source of a radio frequency signal and a detected power level output has a differential amplifier detector circuit with an input connected to the detection signal input and an output corresponding to the detected power level output. A feedback network is connected to the input and the output of the differential amplifier detector circuit. A mirror circuit is connected to the differential amplifier detector circuit. A root mean square current corresponding to a power level of the radio frequency signal from the source is mirrored and integrated, with a direct current voltage level being generated therefrom and output to the detected power level output.

Abstract: A current mirror circuit connectible to an amplifier circuit to set a bias point thereof includes a current mirror circuit, and a bias resistor connected thereto. The bias resistor is connectible to the amplifier circuit. A first helper circuit is connected in parallel with the bias resistor, and is selectively activated for a first predetermined duration by a first control signal. The activated first helper circuit defines a lower resistance path relative to the bias resistor to shorten a rising transient response of the amplifier circuit as the current mirror circuit is activated.

Abstract: An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A mirror transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.

Abstract: A radio frequency front end circuit includes an output signal transmission line, an amplifier circuit with an input connected to a radio frequency signal source and an output connected to the output signal transmission line. A harmonic suppression circuit is connected to the amplifier circuit, and includes an active circuit element having a frequency-dependent impedance and is tuned as a reflective trap with a negative capacitance for one or more rejection frequency ranges each corresponding to a multiple of a fundamental frequency of a signal generated by the radio frequency signal source.

Abstract: A power detector with a detection signal input connectable to a source of a radio frequency signal and a detected power level output has a differential amplifier detector circuit with an input connected to the detection signal input and an output corresponding to the detected power level output. A feedback network is connected to the input and the output of the differential amplifier detector circuit. A mirror circuit is connected to the differential amplifier detector circuit. A root mean square current corresponding to a power level of the radio frequency signal from the source is mirrored and integrated, with a direct current voltage level being generated therefrom and output to the detected power level output.

Abstract: An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A mirror transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.

Abstract: A radio frequency front end circuit includes an output signal transmission line, an amplifier circuit with an input connected to a radio frequency signal source and an output connected to the output signal transmission line. A harmonic suppression circuit is connected to the amplifier circuit, and includes an active circuit element having a frequency-dependent impedance and is tuned as a reflective trap with a negative capacitance for one or more rejection frequency ranges each corresponding to a multiple of a fundamental frequency of a signal generated by the radio frequency signal source.

Abstract: A radio frequency front end circuit includes an output signal transmission line, an amplifier circuit with an input connected to a radio frequency signal source and an output connected to the output signal transmission line. A harmonic suppression circuit is connected to the amplifier circuit, and includes an active circuit element having a frequency-dependent impedance and is tuned as a reflective trap with a negative capacitance for one or more rejection frequency ranges each corresponding to a multiple of a fundamental frequency of a signal generated by the radio frequency signal source.

Abstract: A radio frequency (RF) power amplifier circuit includes an input and an output. A power amplifier transistor has a first terminal connected to the input, a second terminal connected to the output, and a third terminal defined by a degeneration inductance. A first capacitor is connected to the third terminal of the power amplifier transistor, along with a negative capacitance circuit connected in series with the first capacitor. The negative capacitance and the first capacitor define a series resonance at a predefined operating frequency band, which shunts the degeneration inductance of the third terminal.

Abstract: A radio frequency (RF) power amplifier circuit includes an input and an output. A power amplifier transistor has a first terminal connected to the input, a second terminal connected to the output, and a third terminal defined by a degeneration inductance. A first capacitor is connected to the third terminal of the power amplifier transistor, along with a negative capacitance circuit connected in series with the first capacitor. The negative capacitance and the first capacitor define a series resonance at a predefined operating frequency band, which shunts the degeneration inductance of the third terminal.