Patents by Inventor Louis A. Rasor

Louis A. Rasor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10567215
    Abstract: Provided are a computer program product, system, and method for using an out-of-band network to coordinate a first node reconfiguring a bus interface port used by a second node to communicate on a bus. The first node configures the bus to enable the second node to link to the bus. The second node sends a join request to the first node over an out-of-band network separate from the bus in response to determining that the second node cannot join the bus. The first node reconfigures the bus to enable the second node to communicate on the bus in response to receiving the join request from the second node over the out-of-band network.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: February 18, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Louis A Rasor, Sean P. Riley, Juan J. Ruiz
  • Patent number: 10565020
    Abstract: A plurality of central processing units (CPUs) are allocated as a set of dedicated CPUs for processing tasks of an input/output (I/O) resource. In response to determining that a CPU utilization for the set of dedicated CPUs is less than a first predetermined threshold, at least one CPU of the set of dedicated CPUs is configured as a reserved CPU to execute tasks for one or more entities other than the I/O resource. In response to determining that a CPU utilization for the set of dedicated CPUs is greater than a second predetermined threshold, the reserved CPU is configured as a dedicated CPU to process tasks for the I/O resource.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: February 18, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Veronica S. Davila, Trung N. Nguyen, Louis A. Rasor
  • Patent number: 10387218
    Abstract: Provided are techniques for lock profiling tool to identify code bottlenecks. A lock spin duration for a lock is determined. It is determined that the lock spin duration is greater than a lock trace threshold. The lock spin duration is classified into a time duration bucket. It is determining whether the lock is found in a list of locks for the time duration bucket. In response to determining that the lock is found in the list of locks, a lock count for the lock is incremented by one. In response to determining that the lock is not found in the list of locks, an entry for the lock is added in the list of locks for the time duration bucket and the lock count for the lock is initialized to one. A total spin duration time for the lock is updated by the lock spin duration.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: August 20, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Trung N. Nguyen, Louis A. Rasor
  • Publication number: 20190205168
    Abstract: A plurality of processing entities are maintained. A plurality of task control block (TCB) groups are generated, wherein each of the plurality of TCB groups are restricted to one or more different processing entities of the plurality of processing entities. A TCB is assigned to one of the plurality of TCB groups, at TCB creation time.
    Type: Application
    Filed: March 8, 2019
    Publication date: July 4, 2019
    Inventors: Seamus J. Burke, Trung N. Nguyen, Louis A. Rasor
  • Publication number: 20190188052
    Abstract: A plurality of ordered lists of dispatch queues corresponding to a plurality of processing entities are maintained, wherein each dispatch queue includes one or more task control blocks or is empty. A determination is made as to whether a primary dispatch queue of a processing entity is empty in an ordered list of dispatch queues for the processing entity. In response to determining that the primary dispatch queue of the processing entity is empty, a task control block is selected for processing by the processing entity from another dispatch queue of the ordered list of dispatch queues for the processing entity, wherein the another dispatch queue from which the task control block is selected meets a threshold criteria for the processing entity.
    Type: Application
    Filed: February 22, 2019
    Publication date: June 20, 2019
    Inventors: Seamus J. Burke, Trung N. Nguyen, Louis A. Rasor
  • Publication number: 20190138357
    Abstract: A plurality of processing entities are maintained. An indication is made of a primary processing entities group for a task control block (TCB). An indication is made of a secondary processing entities group for the TCB. In response to determining that the secondary processing entities group has processing cycles available for processing additional TCBs, the TCB is moved from the primary processing entities group to the secondary processing entities group for processing.
    Type: Application
    Filed: January 3, 2019
    Publication date: May 9, 2019
    Inventors: Seamus J. Burke, Trung N. Nguyen, Louis A. Rasor
  • Patent number: 10255117
    Abstract: A plurality of ordered lists of dispatch queues corresponding to a plurality of processing entities are maintained, wherein each dispatch queue includes one or more task control blocks or is empty. A determination is made as to whether a primary dispatch queue of a processing entity is empty in an ordered list of dispatch queues for the processing entity. In response to determining that the primary dispatch queue of the processing entity is empty, a task control block is selected for processing by the processing entity from another dispatch queue of the ordered list of dispatch queues for the processing entity, wherein the another dispatch queue from which the task control block is selected meets a threshold criteria for the processing entity.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: April 9, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Seamus J. Burke, Trung N. Nguyen, Louis A. Rasor
  • Patent number: 10228985
    Abstract: A computational device maintains a spinlock for exclusive access of a resource by a process of a plurality of processes. In response to determining by the process that a turn for securing the spinlock has not arrived for the process, a sleep duration is determined for the process, prior to making a next attempt to secure the spinlock.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: March 12, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Seamus J. Burke, Trung N. Nguyen, Louis A. Rasor
  • Publication number: 20190073142
    Abstract: Provided are techniques for synchronously performing commit records operations. A local copy of a commit records message is built for a Non-Volatile Storage (NVS) track, with a valid indicator set to indicate that this commit records message is valid and has not been processed yet. A Direct Memory Access (DMA) chain is executed to transfer customer data from a host to real segments and alternate segments of a track buffer and to transfer the local copy of the commit records message to a mail message structure of a mail message array. At DMA completion, an NVS manager is synchronously called to perform a commit records operation with the commit records message in the mail message structure. In response to the commit records operation completing, there is an indication that a new write DMA is allowed to proceed for the NVS track.
    Type: Application
    Filed: September 5, 2017
    Publication date: March 7, 2019
    Inventors: Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos, Beth A. Peterson, Louis A. Rasor
  • Publication number: 20190073157
    Abstract: An indication is made for each task category of a plurality of task categories, of a first attribute that indicates a data set to be collected, a second attribute that indicates a first predetermined amount of time within which a central processing unit (CPU) stops executing a task of the task category, and a third attribute that indicates a second predetermined amount of time within which the CPU that was executing the task of the task category collects the data set. In response to occurrence of an event, a plurality of CPUs are stopped to collect a plurality of data sets, based on first attributes, second attributes, and third attributes of task categories corresponding to tasks executing on the plurality of CPUs.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 7, 2019
    Inventors: Trung N. Nguyen, Louis A. Rasor, Juan J. Ruiz
  • Publication number: 20190073280
    Abstract: A plurality of tasks are executed on a plurality of central processing units (CPUs) of a computational device. In response to an occurrence of an event in the computational device, one or more CPUs that are executing tasks associated with an event category to which the event belongs are stopped within a first predetermined amount of time. In response to stopping the one or more CPUs, a data set indicative of a state of the computational device is collected, for at most a second predetermined amount of time.
    Type: Application
    Filed: September 5, 2017
    Publication date: March 7, 2019
    Inventors: Matthew D. Carson, Trung N. Nguyen, Louis A. Rasor, Todd C. Sorenson
  • Publication number: 20190065257
    Abstract: A plurality of central processing units (CPUs) are allocated as a set of dedicated CPUs for processing tasks of an input/output (I/O) resource. In response to determining that a CPU utilization for the set of dedicated CPUs is less than a first predetermined threshold, at least one CPU of the set of dedicated CPUs is configured as a reserved CPU to execute tasks for one or more entities other than the I/O resource. In response to determining that a CPU utilization for the set of dedicated CPUs is greater than a second predetermined threshold, the reserved CPU is configured as a dedicated CPU to process tasks for the I/O resource.
    Type: Application
    Filed: August 29, 2017
    Publication date: February 28, 2019
    Inventors: Veronica S. Davila, Trung N. Nguyen, Louis A. Rasor
  • Publication number: 20190056974
    Abstract: A plurality of dispatch queues corresponding to a plurality of processing entities are maintained, wherein each dispatch queue includes one or more task control blocks or is empty, and wherein an ordered list of dispatch queues is maintained for each processing entity of the plurality of processing entities. A state for each of the plurality of dispatch queues is determined and the determined state is compared to a desired state for the plurality of dispatch queues. A task control block is moved from one dispatch queue to another dispatch queue, in response to the comparing of the determined state to the desired state for the plurality of dispatch queues.
    Type: Application
    Filed: August 18, 2017
    Publication date: February 21, 2019
    Inventors: Seamus J. Burke, Trung N. Nguyen, Louis A. Rasor
  • Patent number: 10185593
    Abstract: A plurality of processing entities are maintained. An indication is made of a primary processing entities group for a task control block (TCB). An indication is made of a secondary processing entities group for the TCB. In response to determining that the secondary processing entities group has processing cycles available for processing additional TCBs, the TCB is moved from the primary processing entities group to the secondary processing entities group for processing.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: January 22, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Seamus J. Burke, Trung N. Nguyen, Louis A. Rasor
  • Publication number: 20180341541
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines one or more resources that are impacted by an error. A cleanup of tasks associated with the one or more resources that are impacted by the error is performed, to recover from the error, wherein host input/output (I/O) operations continue to be processed, and wherein tasks associated with other resources continue to execute.
    Type: Application
    Filed: August 2, 2018
    Publication date: November 29, 2018
    Inventors: Wang Ping He, Larry Juarez, Matthew J. Kalos, John N. McCauley, Louis A. Rasor, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20180341542
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines one or more resources that are impacted by an error. A cleanup of tasks associated with the one or more resources that are impacted by the error is performed, to recover from the error, wherein host input/output (I/O) operations continue to be processed, and wherein tasks associated with other resources continue to execute.
    Type: Application
    Filed: August 2, 2018
    Publication date: November 29, 2018
    Inventors: Wang Ping He, Larry Juarez, Matthew J. Kalos, John N. McCauley, Louis A. Rasor, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10120716
    Abstract: Mechanisms for improving computing system performance by a processor device. System resources are organized into a plurality of groups. Each of the plurality of groups is assigned one of a plurality of predetermined task pools. Each of the predetermined task pools has a plurality of tasks. Each of the plurality of groups corresponds to at least one physical boundary of the system resources such that a speed of an execution of those of the plurality of tasks for a particular one of the plurality of predetermined task pools is optimized by a placement of an association with the at least one physical boundary and the plurality of groups.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: November 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. Ash, Seamus J. Burke, Lokesh M. Gupta, Clint A. Hardy, Matthew J. Kalos, Trung N. Nguyen, Karl A. Nielsen, Louis A. Rasor, David B. Whitworth
  • Patent number: 10097484
    Abstract: Provided are a computer program product, system, and method for using send buffers and receive buffers for sending messages among nodes in a network. A send buffer is provided for each of at least one receiving node comprising one of the nodes to which messages are sent. Each of the receiving nodes includes at least one receive buffer to receive messages from the send buffer at the sending node. A determination is made of a buffer entry for a send buffer and receive buffer pair that is available for use. Indication is made of the message in the determined buffer entry of the send buffer. The message is sent from the send buffer to the receiving node indicating the determined buffer entry in which the message is indicated to cause the receiving node to include the message in the indicated buffer entry in the receive buffer.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: October 9, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Trung N. Nguyen, Louis A. Rasor, Juan J. Ruiz
  • Patent number: 10067818
    Abstract: Provided are a method, a system, and a computer program product in which a storage controller determines one or more resources that are impacted by an error. A cleanup of tasks associated with the one or more resources that are impacted by the error is performed, to recover from the error, wherein host input/output (I/O) operations continue to be processed, and wherein tasks associated with other resources continue to execute.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: September 4, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wang Ping He, Larry Juarez, Matthew J. Kalos, John N. McCauley, Louis A. Rasor, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20180136986
    Abstract: Provided are techniques for lock profiling tool to identify code bottlenecks. A lock spin duration for a lock is determined. It is determined that the lock spin duration is greater than a lock trace threshold. The lock spin duration is classified into a time duration bucket. It is determining whether the lock is found in a list of locks for the time duration bucket. In response to determining that the lock is found in the list of locks, a lock count for the lock is incremented by one. In response to determining that the lock is not found in the list of locks, an entry for the lock is added in the list of locks for the time duration bucket and the lock count for the lock is initialized to one. A total spin duration time for the lock is updated by the lock spin duration.
    Type: Application
    Filed: November 14, 2016
    Publication date: May 17, 2018
    Inventors: Trung N. Nguyen, Louis A. Rasor