Abstract: A home satellite receiving system employs a transmodulating outdoor unit (ODU) that tunes to multiple signals, demodulates those signals into streams of data packets, and filters the streams of data packets to select data packets pertaining to viewer-specified programs. The ODU then constructs an integrated bitstream from the selected data packets and modulates that bitstream for transmission to an indoor IRD. This allows transfer of multiple programs from different satellite sources to the indoor IRD over a single coaxial cable. The indoor IRD reconstructs the packet stream timing for the viewer-specified programs from the integrated bitstream.

Abstract: Methods and systems for processing a single sub-channel that includes two or more combined channels. Using intermediate frequency sub-sampling, two or more channels from a broad band signal are combined into a single sub-channel for further analog and digital processing. Each of the two or more channels is down converted to an intermediate frequency, filtered to remove certain undesired channels, and combined such that the two or more channels are adjacent to each other. A digital representation of the sub-channel is produced from the combined intermediate frequency channels. Each channel within the digital representation is down converted to baseband, and the in-phase and quadrature components are separated from each other. Compared to one direct down conversion technique, intermediate frequency sub-sampling as described in the application may reduce the number of analog to digital converters and control amplifiers used in analog processing by a factor of four.

Abstract: A PC-based personal video recorder (PVR) system enables recordation of video content on a general-purpose computer in a way that the computer is unable to perceptively display the recorded content, but is able to playback and distribute the content to a decoder box (e.g., set-top box) for display on a television. In one implementation, the general-purpose computer is equipped with a personal video recorder (PVR) card having a video tuner, a network connection, and scrambling capabilities. The PVR card is configured to receive video content and produce compressed digital video. The card scrambles the video content and stores it in the computer's memory. The scrambled video content is in a form that cannot be perceptibly displayed by the computer. During playback, the PVR card retrieves the scrambled video content from the memory, descrambles it, and outputs the video content to the decoder box for playback on the television.

Abstract: In an implementation of a display source divider, a video generation system generates a video display source that includes display data for multiple display regions on a display device. For example, a gaming system generates a video display source that includes display data partitioned display, where each region of the partitioned display corresponds to a different player of the gaming system. A display source divider receives the video display source and generates multiple video streams each corresponding to a different display region of the partitioned display.

Abstract: In an implementation of a display source divider, a video generation system generates a video display source that includes display data for multiple display regions on a display device. For example, a gaming system generates a video display source that includes display data for a partitioned display, where each region of the partitioned display corresponds to a different player of the gaming system. A display source divider receives the video display source and generates multiple video streams each corresponding to a different display region of the partitioned display.

Abstract: In an implementation of a display source divider, a video generation system generates a video display source that includes display data for multiple display regions which include left eye display regions and right eye display regions of head display devices. For example, a gaming system generates a video display source that includes display data for left eye display regions and right eye display regions of head display devices that each correspond to a different player of the gaming system. A display source divider receives the video display source and generates a left eye display video stream and an associated right eye display video stream for each of the head display devices.

Abstract: A method and apparatus for managing error/status information generated in the demultiplexing, processing, and handling of data packets from a video transport stream. Error/status information is organized into control fields of error/status packets. The error/status packets are sent to dedicated error/status buffers of bulk system memory where they can be accessed by a system processor during the reconfiguration and decoding of video programming.

Abstract: A first signal component is received having a first signal strength and a second signal component is received having a second signal strength. A difference is identified between the first signal strength and the second signal strength. A determination is made as to whether the difference between the first signal strength and the second signal strength exceeds a threshold. If the difference between the first signal strength and the second signal strength exceeds a threshold, the first signal strength is adjusted to reduce the difference between the first signal strength and the second signal strength.

Abstract: A luminance component of a video signal is modulated in a first frequency band. A first chrominance component of the video signal is modulated in a second frequency band and is mixed with an audio component. A second chrominance component of the video signal is modulated in a third frequency band. The modulated luminance component, the first modulated chrominance component, and the second modulated chrominance component are then transmitted across a communication link.

Abstract: A processing apparatus for processing multiple video programs from one or more transport streams. The processing apparatus has a transport processing circuit that includes multiple transport processor units. The transport processor units utilize a common transport processor memory unit having demux context entries containing processing and hardware state information for packet types. Each transport processor unit includes a transport interface for identifying data packets to be acquired from the transport stream, a demultiplexing processor for processing the acquired data packets, and a demultiplexing DMA unit for memory handling operations of the processed data packets. Index chaining allows the transport processor units to access information from the transport processor memory unit. The method uses indices to access demux context entries from the transport processor memory unit. Related DMA indices are used to access memory handling information from the transport processor memory unit.

Abstract: A luminance component of a video signal is modulated in a first frequency band. A first chrominance component of the video signal is modulated in a second frequency band and is mixed with an audio component. A second chrominance component of the video signal is modulated in a third frequency band. The modulated luminance component, the first modulated chrominance component, and the second modulated chrominance component are then transmitted across a communication link.

Abstract: In an implementation of a display source divider, a video generation system generates a video display source that includes display data for multiple display regions on a display device. For example, a gaming system generates a video display source that includes display data for a partitioned display, where each region of the partitioned display corresponds to a different player of the gaming system. A display source divider receives the video display source and generates multiple video streams each corresponding to a different display region of the partitioned display.

Abstract: A first signal component is received having a first signal strength and a second signal component is received having a second signal strength. A difference is identified between the first signal strength and the second signal strength. A determination is made as to whether the difference between the first signal strength and the second signal strength exceeds a threshold. If the difference between the first signal strength and the second signal strength exceeds a threshold, the first signal strength is adjusted to reduce the difference between the first signal strength and the second signal strength.

Abstract: A home satellite receiving system employs a transmodulating outdoor unit (ODU) that tunes to multiple signals, demodulates those signals into streams of data packets, and filters the streams of data packets to select data packets pertaining to viewer-specified programs. The ODU then constructs an integrated bitstream from the selected data packets and modulates that bitstream for transmission to an indoor IRD. This allows transfer of multiple programs from different satellite sources to the indoor IRD over a single coaxial cable. The indoor IRD reconstructs the packet stream timing for the viewer-specified programs from the integrated bitstream.

Abstract: A method and apparatus for managing error/status information generated in the demultiplexing, processing, and handling of data packets from a video transport stream. Error/status information is organized into control fields of error/status packets. The error/status packets are sent to dedicated error/status buffers of bulk system memory where they can be accessed by a system processor during the reconfiguration and decoding of video programming.

Abstract: A luminance component of a video signal is modulated in a first frequency band. A chrominance component of the video signal is modulated in a second frequency band. The modulated luminance component and the modulated chrominance component are then transmitted across a communication link.

Abstract: Methods and systems for processing a single sub-channel that includes two or more combined channels. Using intermediate frequency sub-sampling, two or more channels from a broad band signal are combined into a single sub-channel for further analog and digital processing. Each of the two or more channels is down converted to an intermediate frequency, filtered to remove certain undesired channels, and combined such that the two or more channels are adjacent to each other. A digital representation of the sub-channel is produced from the combined intermediate frequency channels. Each channel within the digital representation is down converted to baseband, and the in-phase and quadrature components are separated from each other. Compared to one direct down conversion technique, intermediate frequency sub-sampling as described in the application may reduce the number of analog to digital converters and control amplifiers used in analog processing by a factor of four.

Abstract: A numerically controlled oscillator that generates an accurate digital representation of a repeating waveform such as a sinusoidal wave. Based on the desired output frequency, multiple samples are calculated from multiple cycles of the repeating waveform. As samples are taken, they are stored in a memory location until a sufficient number of samples are accumulated. After the samples are accumulated, they are output in a specified order, which generates an accurate digital representation of a sinusoidal wave at the desired output frequency.

Abstract: In a computer system including a packet-switched bus, a method for requesting transactions such that memory accesses are initiated quickly. A master transmits a first portion of a transaction request packet having multiple portion. A memory controller receives the first portion of the transaction request, which includes a row address portion of a memory address. The memory controller initiates a memory access by applying a row address strobe signal to the row of the memory location in response to receiving the first portion of the request packet, and the master transmits any remaining portion of the transaction request. After the full memory address has been received, it is determined whether data stored at the memory location is to be read from a source other than the memory location. The memory controller aborts the memory access by inhibiting assertion of a column access strobe signal to the memory location if the data is to be read from a source other than the memory location.

Abstract: This invention describes a link-by-link flow control method for packet-switched uniprocessor and multiprocessor computer systems that maximizes system resource utilization and throughput, and minimizes system latency. The computer system comprises one or more master interfaces, one or more slave interfaces, and an interconnect system controller which provides dedicated transaction request queues for each master interface and controls the forwarding of transactions to each slave interface. The master interface keeps track of the number of requests in the dedicated queue in the system controller, and the system controller keeps track of the number of requests in each slave interface queue. Both the master interface, and system controller know the maximum capacity of the queue immediately downstream from it, and does not issue more transaction requests than what the downstream queue can accommodate.